LM3S9B81 Datasheet, PDF (971/1155 Pages) Texas Instruments – Stellaris® LM3S9B81 Microcontroller

Stellaris® LM3S9B81 Microcontroller
OTG A /
Host
Register 255: USB Host Transmit Interval Endpoint 1 (USBTXINTERVAL1),
offset 0x11B
Register 256: USB Host Transmit Interval Endpoint 2 (USBTXINTERVAL2),
offset 0x12B
Register 257: USB Host Transmit Interval Endpoint 3 (USBTXINTERVAL3),
offset 0x13B
Register 258: USB Host Transmit Interval Endpoint 4 (USBTXINTERVAL4),
offset 0x14B
Register 259: USB Host Transmit Interval Endpoint 5 (USBTXINTERVAL5),
offset 0x15B
Register 260: USB Host Transmit Interval Endpoint 6 (USBTXINTERVAL6),
offset 0x16B
Register 261: USB Host Transmit Interval Endpoint 7 (USBTXINTERVAL7),
offset 0x17B
Register 262: USB Host Transmit Interval Endpoint 8 (USBTXINTERVAL8),
offset 0x18B
Register 263: USB Host Transmit Interval Endpoint 9 (USBTXINTERVAL9),
offset 0x19B
Register 264: USB Host Transmit Interval Endpoint 10 (USBTXINTERVAL10),
offset 0x1AB
Register 265: USB Host Transmit Interval Endpoint 11 (USBTXINTERVAL11),
offset 0x1BB
Register 266: USB Host Transmit Interval Endpoint 12 (USBTXINTERVAL12),
offset 0x1CB
Register 267: USB Host Transmit Interval Endpoint 13 (USBTXINTERVAL13),
offset 0x1DB
Register 268: USB Host Transmit Interval Endpoint 14 (USBTXINTERVAL14),
offset 0x1EB
Register 269: USB Host Transmit Interval Endpoint 15 (USBTXINTERVAL15),
offset 0x1FB
USBTXINTERVALn is an 8-bit register that, for interrupt and isochronous transfers, defines the
polling interval for the currently selected transmit endpoint. For bulk endpoints, this register defines
the number of frames after which the endpoint should time out on receiving a stream of NAK
responses.
The USBTXINTERVALn register value defines a number of frames, as follows:
June 29, 2010
971
Texas Instruments-Advance Information