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LM3S9B81 Datasheet, PDF (1116/1155 Pages) Texas Instruments – Stellaris® LM3S9B81 Microcontroller
Register Quick Reference
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0
WDTPeriphID5, type RO, offset 0xFD4, reset 0x0000.0000
WDTPeriphID6, type RO, offset 0xFD8, reset 0x0000.0000
PID5
WDTPeriphID7, type RO, offset 0xFDC, reset 0x0000.0000
PID6
WDTPeriphID0, type RO, offset 0xFE0, reset 0x0000.0005
PID7
WDTPeriphID1, type RO, offset 0xFE4, reset 0x0000.0018
PID0
WDTPeriphID2, type RO, offset 0xFE8, reset 0x0000.0018
PID1
WDTPeriphID3, type RO, offset 0xFEC, reset 0x0000.0001
PID2
WDTPCellID0, type RO, offset 0xFF0, reset 0x0000.000D
PID3
WDTPCellID1, type RO, offset 0xFF4, reset 0x0000.00F0
CID0
WDTPCellID2, type RO, offset 0xFF8, reset 0x0000.0006
CID1
WDTPCellID3, type RO, offset 0xFFC, reset 0x0000.00B1
CID2
Analog-to-Digital Converter (ADC)
ADC0 base: 0x4003.8000
ADC1 base: 0x4003.9000
ADCACTSS, type R/W, offset 0x000, reset 0x0000.0000
CID3
ADCRIS, type RO, offset 0x004, reset 0x0000.0000
ADCIM, type R/W, offset 0x008, reset 0x0000.0000
ADCISC, type R/W1C, offset 0x00C, reset 0x0000.0000
ADCOSTAT, type R/W1C, offset 0x010, reset 0x0000.0000
ASEN3 ASEN2 ASEN1 ASEN0
INR3
INR2
INR1
INRDC
INR0
DCONSS3 DCONSS2 DCONSS1 DCONSS0
MASK3 MASK2 MASK1 MASK0
DCINSS3 DCINSS2 DCINSS1 DCINSS0
IN3
IN2
IN1
IN0
OV3
OV2
OV1
OV0
1116
Texas Instruments-Advance Information
June 29, 2010