LM3S9B81 Datasheet, PDF (432/1155 Pages) Texas Instruments – Stellaris® LM3S9B81 Microcontroller

General-Purpose Timers
11.3.3.3
16-Bit Input Edge-Time Mode
Note:
For rising-edge detection, the input signal must be High for at least two system clock periods
following the rising edge. Similarly, for falling edge detection, the input signal must be Low
for at least two system clock periods following the falling edge. Based on this criteria, the
maximum input frequency for edge detection is 1/4 of the system frequency.
The prescaler is not available in 16-Bit Input Edge-Time mode.
In Edge-Time mode, the timer is configured as a 16-bit free-running down-counter. In this mode,
the timer is initialized to the value loaded in the GPTMTnILR register (or 0xFFFF at reset). In this
mode, the timer is capable of capturing three types of events: rising edge, falling edge, or both. The
timer is placed into Edge-Time mode by setting the TnCMR bit in the GPTMTnMR register, and the
type of event that the timer captures is determined by the TnEVENT fields of the GPTMCnTL register.
When software writes the TnEN bit in the GPTMCTL register, the timer is enabled for event capture.
When the selected input event is detected, the current Tn counter value is captured in the GPTMTnR
register and is available to be read by the microcontroller. The GPTM then asserts the CnERIS bit
(and the CnEMIS bit, if the interrupt is not masked). The GPTMTnV is the free-running value of the
timer and can be read to determine the time that elapsed between the interrupt assertion and the
entry into the ISR.
In addition to generating interrupts, a μDMA trigger can be generated. The μDMA trigger is enabled
by configuring and enabling the appropriate μDMA channel. See “Channel Configuration” on page 240.
After an event has been captured, the timer does not stop counting. It continues to count until the
TnEN bit is cleared. When the timer reaches the 0x0000 state, it is reloaded with the value from the
GPTMnILR register.
Figure 11-3 on page 433 shows how input edge timing mode works. In the diagram, it is assumed
that the start value of the timer is the default value of 0xFFFF, and the timer is configured to capture
rising edge events.
Each time a rising edge event is detected, the current count value is loaded into the GPTMTnR
register, and is held there until another rising edge is detected (at which point the new count value
is loaded into GPTMTnR).
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June 29, 2010
Texas Instruments-Advance Information