LM3S9B81 Datasheet, PDF (358/1155 Pages) Texas Instruments – Stellaris® LM3S9B81 Microcontroller

External Peripheral Interface (EPI)
8-mA drive when interfacing to SDRAM, see page 322. Any unused EPI controller signals can be
used as GPIOs or another alternate function.
Table 10-3. EPI SDRAM Signal Connections
EPI Signal
EPI0S0
EPI0S1
EPI0S2
EPI0S3
EPI0S4
EPI0S5
EPI0S6
EPI0S7
EPI0S8
EPI0S9
EPI0S10
EPI0S11
EPI0S12
EPI0S13
EPI0S14
EPI0S15
EPI0S16
EPI0S17
EPI0S18
EPI0S19
EPI0S20-EPI0S27
EPI0S28
EPI0S29
EPI0S30
EPI0S31
a. If 2 signals are listed, connect the EPI signal to both pins.
b. Only for 256/512 megabit SDRAMs
SDRAM Signal^a
A0
D0
A1
D1
A2
D2
A3
D3
A4
D4
A5
D5
A6
D6
A7
D7
A8
D8
A9
D9
A10
D10
A11
D11
A12^b
D12
BA0
D13
BA1
D14
D15
DQML
DQMH
CASn
RASn
not used
WEn
CSn
CKE
CLK
10.4.1.2
Refresh Configuration
The refresh count is based on the external clock speed and the number of rows per bank as well
as the refresh period. The RFSH field represents how many external clock cycles remain before an
AUTO-REFRESH is required. The normal formula is:
RFSH = (t_{Refresh_us} / number_rows) / ext_clock_period
A refresh period is normally 64 ms, or 64000 μs. The number of rows is normally 4096 or 8192. The
ext_clock_period is a value expressed in μsec and is derived by dividing 1000 by the clock speed
expressed in MHz. So, 50 MHz is 1000/50=20 ns, or 0.02 μs. A typical SDRAM is 4096 rows per
bank if the system clock is running at 50 MHz with an EPIBAUD register value of 0:
RFSH = (64000/4096) / 0.02 = 15.625 μs / 0.02 μs = 781.25
358
June 29, 2010
Texas Instruments-Advance Information