LM3S9B81 Datasheet, PDF (1041/1155 Pages) Texas Instruments – Stellaris® LM3S9B81 Microcontroller

Stellaris® LM3S9B81 Microcontroller
Table 23-4. Signals by Function, Except for GPIO (continued)
Function
Pin Name Pin Number Pin Type Buffer Type^a
Description
Power
GND
9
-
Power Ground reference for logic and I/O pins.
21
45
57
69
82
94
GNDA
4
-
Power The ground reference for the analog circuits (ADC,
Analog Comparators, etc.). These are separated
from GND to minimize the electrical noise contained
on VDD from affecting the analog functions.
LDO
7
-
Power Low drop-out regulator output voltage. This pin
requires an external capacitor between the pin and
GND of 1 µF or greater. When the on-chip LDO is
used to provide power to the logic, the LDO pin must
also be connected to the VDDC pins at the board
level in addition to the decoupling capacitor(s).
VDD
8
-
Power Positive supply for I/O and some logic.
20
32
44
56
68
81
93
VDDA
3
-
Power The positive supply (3.3 V) for the analog circuits
(ADC, Analog Comparators, etc.). These are
separated from VDD to minimize the electrical noise
contained on VDD from affecting the analog
functions. VDDA pins must be connected to 3.3 V,
regardless of system implementation.
VDDC
38
-
Power Positive supply for most of the logic function,
88
including the processor core and most peripherals.
SSI
SSI0Clk
28
I/O
TTL
SSI module 0 clock.
SSI0Fss
29
I/O
TTL
SSI module 0 frame.
SSI0Rx
30
I
TTL
SSI module 0 receive.
SSI0Tx
31
O
TTL
SSI module 0 transmit.
SSI1Clk
60
74
76
I/O
TTL
SSI module 1 clock.
SSI1Fss
59
63
75
I/O
TTL
SSI module 1 frame.
SSI1Rx
42
62
95
I
TTL
SSI module 1 receive.
SSI1Tx
15
O
TTL
SSI module 1 transmit.
41
96
June 29, 2010
Texas Instruments-Advance Information
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