LM3S9B81 Datasheet, PDF (364/1155 Pages) Texas Instruments – Stellaris® LM3S9B81 Microcontroller

External Peripheral Interface (EPI)
Table 10-5. EPI Host-Bus 8 Signal Connections (continued)
EPI Signal
CSCFG
HB8 Signal (MODE
=ADMUX)
HB8 Signal (MODE
=ADNOMUX (Cont.
Read))
HB8 Signal (MODE
=XFIFO)
EPI0S23
X
A23
A15
-
EPI0S24
X
A24
A16
-
0x0
EPI0S25
0x1
A25^b
0x2
-
A17
CS1n
0x3
-
0x0
0x1
A26
EPI0S26
0x2
A18
FEMPTY
0x3
CS0n
CS0n
EPI0S27
0x0
A27
0x1
0x2
CSn1
A19
CSn1
FFULL
0x3
EPI0S28
X
RDn/OEn
RDn/OEn
RDn
EPI0S29
X
WRn
WRn
WRn
0x0
ALE
ALE
-
EPI0S30
0x1
CSn
0x2
CS0n
CSn
CS0n
CSn
CS0n
EPI0S31
0x3
ALE
X
Clock^c
ALE
Clock^c
-
Clock^c
a. "X" indicates the state of this field is a don't care.
b. When an entry straddles several row, the signal configuration is the same for all rows.
c. The clock signal is not required for this mode and has unspecified timing relationships to other signals.
Table 10-6 on page 364 shows how the EPI[31:0] signals function while in Host-Bus 16 mode.
Notice that the signal configuration changes based on the address/data mode selected by the MODE
field in the EPIHB16CFG2 register, on the chip select configuration selected by the CSCFG field in
the same register, and on whether byte selects are used as configured by the BSEL bit in the
EPIHB16CFG register. Any unused EPI controller signals can be used as GPIOs or another alternate
function.
Table 10-6. EPI Host-Bus 16 Signal Connections
EPI Signal
CSCFG
BSEL
HB16 Signal (MODE
=ADMUX)
EPI0S0
X^a
X
AD0
EPI0S1
X
X
AD1
EPI0S2
X
X
AD2
EPI0S3
X
X
AD3
EPI0S4
X
X
AD4
EPI0S5
X
X
AD5
HB16 Signal (MODE
=ADNOMUX (Cont.
Read))
D0
D1
D2
D3
D4
D5
HB16 Signal
(MODE =XFIFO)
D0
D1
D2
D3
D4
D5
364
June 29, 2010
Texas Instruments-Advance Information