LM3S9B81 Datasheet, PDF (1123/1155 Pages) Texas Instruments – Stellaris® LM3S9B81 Microcontroller

Stellaris® LM3S9B81 Microcontroller
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SSIPCellID3, type RO, offset 0xFFC, reset 0x0000.00B1
Inter-Integrated Circuit (I²C) Interface
I²C Master
I2C Master 0 base: 0x4002.0000
I2C Master 1 base: 0x4002.1000
I2CMSA, type R/W, offset 0x000, reset 0x0000.0000
I2CMCS, type RO, offset 0x004, reset 0x0000.0000 (Read-Only Status Register)
I2CMCS, type WO, offset 0x004, reset 0x0000.0000 (Write-Only Control Register)
I2CMDR, type R/W, offset 0x008, reset 0x0000.0000
I2CMTPR, type R/W, offset 0x00C, reset 0x0000.0001
I2CMIMR, type R/W, offset 0x010, reset 0x0000.0000
I2CMRIS, type RO, offset 0x014, reset 0x0000.0000
I2CMMIS, type RO, offset 0x018, reset 0x0000.0000
I2CMICR, type WO, offset 0x01C, reset 0x0000.0000
I2CMCR, type R/W, offset 0x020, reset 0x0000.0000
Inter-Integrated Circuit (I²C) Interface
I²C Slave
I2C Slave 0 base: 0x4002.0800
I2C Slave 1 base: 0x4002.1800
I2CSOAR, type R/W, offset 0x000, reset 0x0000.0000
I2CSCSR, type RO, offset 0x004, reset 0x0000.0000 (Read-Only Status Register)
I2CSCSR, type WO, offset 0x004, reset 0x0000.0000 (Write-Only Control Register)
I2CSDR, type R/W, offset 0x008, reset 0x0000.0000
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0
CID3
SA
R/S
BUSBSY IDLE ARBLST DATACK ADRACK ERROR BUSY
ACK
STOP START RUN
DATA
TPR
IM
RIS
MIS
IC
SFE
MFE
LPBK
OAR
FBR
TREQ RREQ
DA
DATA
June 29, 2010
Texas Instruments-Advance Information
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