LM3S9B81 Datasheet, PDF (49/1155 Pages) Texas Instruments – Stellaris® LM3S9B81 Microcontroller

Stellaris® LM3S9B81 Microcontroller
1.1.4
– Multiplexed address/data interface for reduced pin count
■ Host-bus
– Traditional x8 and x16 MCU bus interface capabilities
– Similar device compatibility options as PIC, ATmega, 8051, and others
– Access to SRAM, NOR Flash memory, and other devices, with up to 1 MB of addressing in
unmultiplexed mode and 256 MB in multiplexed mode (512 MB in Host-Bus 16 mode with
no byte selects)
– Support of both muxed and de-muxed address and data
– Access to a range of devices supporting the non-address FIFO x8 and x16 interface variant,
with support for external FIFO (XFIFO) EMPTY and FULL signals
– Speed controlled, with read and write data wait-state counters
– Chip select modes include ALE, CSn, Dual CSn and ALE with dual CSn
– Manual chip-enable (or use extra address pins)
■ General Purpose
– Wide parallel interfaces for fast communications with CPLDs and FPGAs
– Data widths up to 32-bits
– Data rates up to 150 MB/second
– Optional “address” sizes from 4 bits to 20 bits
– Optional clock output, read/write strobes, framing (with counter-based size), and clock-enable
input
■ General parallel GPIO
– 1 to 32 bits, FIFOed with speed control
– Useful for custom peripherals or for digital data acquisition and actuator controls
Serial Communications Peripherals
The LM3S9B81 controller supports both asynchronous and synchronous serial communications
with:
■ 10/100 Ethernet MAC and PHY
■ Three CAN 2.0 A/B Controllers
■ USB 2.0 (full speed and low speed) OTG/Host/Device
■ Three UARTs with IrDA and ISO 7816 support (one UART with full modem controls)
■ Two I²C modules
June 29, 2010
49
Texas Instruments-Advance Information