LM3S9B81 Datasheet, PDF (1087/1155 Pages) Texas Instruments – Stellaris® LM3S9B81 Microcontroller

Stellaris® LM3S9B81 Microcontroller
25.2.2.5 System Clock Specifications with ADC Operation
25.2.3
Table 25-15. System Clock Characteristics with ADC Operation
Parameter Parameter Name
Min
f_sysadc
System clock frequency when the ADC module is
16
operating (when PLL is bypassed)
Nom
-
JTAG and Boundary Scan
Table 25-16. JTAG Characteristics
Parameter
No.
Parameter Parameter Name
Min
Nom
J1
J2
J3
J4
J5
J6
J7
J8
J9
J10
J11
t _{TDO_ZDV}
f_TCK
TCK operational clock frequency
t_TCK
TCK operational clock period
t_{TCK_LOW}
TCK clock Low time
t_{TCK_HIGH}
t_{TCK_R}
t_{TCK_F}
t_{TMS_SU}
TCK clock High time
TCK rise time
TCK fall time
TMS setup time to TCK rise
t_{TMS_HLD}
TMS hold time from TCK rise
t_{TDI_SU}
TDI setup time to TCK rise
t_{TDI_HLD}
TDI hold time from TCK rise
TCK fall to Data
Valid from High-Z
2-mA drive
4-mA drive
8-mA drive
0
-
100
-
-
t_TCK
-
t_TCK
0
-
0
-
20
-
20
-
25
-
25
-
-
23
15
14
8-mA drive with slew rate control
18
J12
t _{TDO_DV}
TCK fall to Data
Valid from Data
Valid
2-mA drive
4-mA drive
8-mA drive
-
21
14
13
8-mA drive with slew rate control
18
J13 TCK fall to High-Z
from Data Valid
t _{TDO_DVZ}
2-mA drive
4-mA drive
8-mA drive
-
9
7
6
8-mA drive with slew rate control
7
Figure 25-2. JTAG Test Clock Input Timing
Max
-
Max
10
-
-
-
10
10
-
-
-
-
35
26
25
29
35
25
24
28
11
9
8
9
J2
J3
J4
TCK
J6
J5
Unit
MHz
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
June 29, 2010
Texas Instruments-Advance Information
1087