English
Language : 

LM3S9B81 Datasheet, PDF (469/1155 Pages) Texas Instruments – Stellaris® LM3S9B81 Microcontroller
Stellaris® LM3S9B81 Microcontroller
Register 19: GPTM Timer A Value (GPTMTAV), offset 0x050
When read, this register shows the current, free-running value of Timer A in all modes. Software
can use this value to determine the time elapsed between an interrupt and the ISR entry. When
written, the value written into this register is loaded into the GPTMAR register on the next clock
cycle. In Input Edge-Count mode, bits 23:16 contain the upper 8 bits of the count.
Note: The GPTMTAV register cannot be written in Edge-Count mode.
GPTM Timer A Value (GPTMTAV)
Timer0 base: 0x4003.0000
Timer1 base: 0x4003.1000
Timer2 base: 0x4003.2000
Timer3 base: 0x4003.3000
Offset 0x050
Type RW, reset 0xFFFF.FFFF
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
TAVH
Type RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Reset
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
TAVL
Type RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Reset
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Bit/Field
31:16
15:0
Name
TAVH
TAVL
Type
RW
RW
Reset Description
0xFFFF
GPTM Timer A Value High
When configured for 32-bit mode via the GPTMCFG register, the GPTM
Timer B Value (GPTMTBV) register loads this value on a write. A read
returns the current value of GPTMTBR.
In 16-bit mode, this field reads as 0 and does not have an effect on the
state of GPTMTBR.
0xFFFF
GPTM Timer A Register Low
For both 16- and 32-bit modes, writing this field loads the counter for
Timer A. A read returns the current value of GPTMTAR.
June 29, 2010
469
Texas Instruments-Advance Information