LM3S9B81 Datasheet, PDF (74/1155 Pages) Texas Instruments – Stellaris® LM3S9B81 Microcontroller

ARM Cortex-M3 Processor Core
Table 2-2. 32-Bit Cortex-M3 Instruction Set Summary (continued)
Operation
Assembler
Register halfword [15:0] to register address immediate 8-bit offset, postindexed STRH.W <Rxf>, [<Rn>], #+/–<offset_8>
Subtract immediate 12-bit value from register value
SUB{S}.W <Rd>, <Rn>, #<modify_constant(immed_12)>
Subtract shifted register value from register value
SUB{S}.W <Rd>, <Rn>, <Rm>{, <shift>}
Subtract immediate 12-bit value from register value
SUBW.W <Rd>, <Rn>, #<immed_12>
Sign extend byte to 32 bits
SXTB.W <Rd>, <Rm>{, <rotation>}
Sign extend halfword to 32 bits
SXTH.W <Rd>, <Rm>{, <rotation>}
Table branch byte
TBB [<Rn>, <Rm>]
Table branch halfword
TBH [<Rn>, <Rm>, LSL #1]
Exclusive OR register value with immediate 12-bit value
TEQ.W <Rn>, #<modify_constant(immed_12)>
Exclusive OR register value with shifted register value
TEQ.W <Rn>, <Rm>{, <shift}
Logical AND register value with 12-bit immediate value
TST.W <Rn>, #<modify_constant(immed_12)>
Logical AND register value with shifted register value
TST.W <Rn>, <Rm>{, <shift>}
Copy bit field from register value to register and zero-extend to 32 bits
UBFX.W <Rd>, <Rn>, #<lsb>, #<width>
Unsigned divide
UDIV<c> <Rd>,<Rn>,<Rm>
Multiply two unsigned register values and add to a 2-register value
UMLAL.W <RdLo>, <RdHi>, <Rn>, <Rm>
Multiply two unsigned register values
UMULL.W <RdLo>, <RdHi>, <Rn>, <Rm>
Unsigned saturate
USAT <c> <Rd>, #<imm>, <Rn>{, <shift>}
Copy unsigned byte to register and zero-extend to 32 bits
UXTB.W <Rd>, <Rm>{, <rotation>}
Copy unsigned halfword to register and zero-extend to 32 bits
UXTH.W <Rd>, <Rm>{, <rotation>}
Wait for event
WFE.W
Wait for interrupt
WFI.W
2.2.2
Serial Wire and JTAG Debug
Texas Instruments replaces the ARM SW-DP and JTAG-DP with the ARM CoreSight™-compliant
Serial Wire JTAG Debug Port (SWJ-DP) interface. The SWJ-DP interface combines the SWD and
JTAG debug ports into one module. See the CoreSight™ Design Kit Technical Reference Manual
for details on SWJ-DP.
2.2.3
Embedded Trace Macrocell (ETM)
ETM is not implemented in the Stellaris^® devices. As a result, Chapters 15 and 16 of the ARM®
Cortex™-M3 Technical Reference Manual can be ignored.
2.2.4
Trace Port Interface Unit (TPIU)
The TPIU acts as a bridge between the Cortex-M3 trace data from the ITM, and an off-chip Trace
Port Analyzer. Stellaris^® devices implement the TPIU as shown in Figure 2-2. This implementation
is similar to the non-ETM version described in the ARM® Cortex™-M3 Technical Reference Manual,
however, SWJ-DP only provides the Serial Wire Viewer (SWV) output format for the TPIU.
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June 29, 2010
Texas Instruments-Advance Information