82371AB Datasheet, PDF (94/284 Pages) Intel Corporation – PCI-TO-ISA / IDE XCELERATOR PIIX4

82371AB (PIIX4)
E
Bit
Description
4 Fast Timing Bank Drive Select 1 (TIME1). When TIME1=0, accesses to the data port of the
enabled I/O address range use the 16-bit compatible timing.
When TIME1=1 and the currently selected drive (via a copy of bit 4 of 1x6h) is drive 1, accesses to
the data port of the enabled I/O address range use fast timings. PIO accesses to the data port use
fast timing only if bit 7 of this register (DTE1) is zero. Accesses to all non-data ports of the enabled
I/O address range always use the 8-bit compatible timings.
3 DMA Timing Enable Only (DTE0). When DTE1=0, both DMA and PIO data transfers for drive 0 use
the fast timing mode (this is the preferred setting for optimal performance). When DTE0=1, fast
timing mode is enabled for DMA data transfers for drive 0. PIO transfers run in compatible timing.
2 Prefetch and Posting Enable (PPE0). When PPE0=1, prefetch and posting to the IDE data port is
enabled for drive 0. When PPE0=0, prefetch and posting is disabled for drive 0.
1 IORDY Sample Point Enable Drive Select 0 (IE0). When IE0=0, IORDY sampling is disabled for
drive 0. The internal IORDY signal is forced asserted guaranteeing that IORDY is sampled asserted
at the first sample point as specified by the ISP field in this register.
When IE0=1 and the currently selected drive (via a copy of bit 4 of 1x6h) is drive 0, all accesses to
the enabled I/O address range sample IORDY. The IORDY sample point is specified by the ISP field
in this register.
0 Fast Timing Bank Drive Select 0 (TIME0). When TIME0=0, accesses to the data port of the
enabled I/O address range uses the 16-bit compatible timing.
When TIME0=1 and the currently selected drive (via a copy of bit 4 of 1x6h) is drive 0, accesses to
the data port of the enabled I/O address range use fast timings. PIO accesses to the data port use
fast timing only if bit 3 of this register (DTE0) is 0. Accesses to all non-data ports of the enabled I/O
address range always use the 8-bit compatible timings.
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