82371AB Datasheet, PDF (128/284 Pages) Intel Corporation – PCI-TO-ISA / IDE XCELERATOR PIIX4

82371AB (PIIX4)
E
Bit
Description
9:8 Microsoft* Sound System Decode Select (MSS_SEL)—R/W. Selects the Microsoft Sound System
decode range enabled with bit 7. This field is decoded as follows:
Bits[9:8]
00
01
10
11
MSS Decode
530h–537h
604h–60Bh
E80h–E87h
F40h–F47h
7 Microsoft Sound System Decode Enable (MSS_EN)—R/W. 1=Enable PCI bus decode for
accesses to the I/O address range selected by the MSS_SEL field. 0=Disable. The EIO enable bit,
idle enable bit, or trap enable bit for device 4 must also be set in order to enable those respective
functions.
6:5 Sound Blaster Decode Select (SB_SEL)—R/W. Selects the Sound Blaster decode range enabled
with bit 3. This field is decoded as follows:
Bits[6:5]
00
01
10
11
Sound Blaster Decode
220–22Fh, 230–233h
240–24Fh, 250–253h
260–26Fh, 270–273h
280–28Fh, 290–293h
4 Game Port Enable (GAME_EN). 1=Enable PCI bus decode for accesses to the Game port I/O
address range (200−207h). 0=Disable. The Game Port EIO enable bit, or Device 4 idle enable bit or
trap enable must also be set to enable these respective functions.
3 Sound Blaster 8/16-bit Decode Enable (SB_EN)—R/W. 1=Enable PCI bus decode for accesses
to the I/O address range selected by the SB_SEL field and to the ADLIB (388–38Bh) address
ranges. 0=Disable. The SoundBlaster EIO enable bit, or Device 4 idle enable bit, or trap enable bit
must also be set to enable these respective functions.
2:1 MIDI Decode Select (MIDI_SEL)—R/W. Selects the MIDI decode range enabled with bit 1. This
field is decoded as follows:
Bits[2:1]
00
01
10
11
MIDI Decode
300–303h
310–313h
320–323h
330–333h
0 MIDI Enable (MIDI_EN)—R/W. 1=Enable PCI bus decode for accesses to the I/O address range
selected by the MIDI_SEL field. 0=Disable. The EIO enable bit, idle enable bit, or trap enable bit for
device 4 must also be set in order to enable these respective functions.
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