82371AB Datasheet, PDF (138/284 Pages) Intel Corporation – PCI-TO-ISA / IDE XCELERATOR PIIX4

82371AB (PIIX4)
E
7.2.2. PMEN—POWER MANAGEMENT RESUME ENABLE REGISTER (IO)
I/O Address:
Default Value:
Attribute:
Base + (02h)
00h
Read/Write
Bit
Description
15:11 Reserved.
10 RTC Enable (RTC_EN)—R/W. 1=Enable the generation of a resume event upon setting of the
RTC_STS bit. 0=Disable.
9 Reserved.
8 Power Button Enable (PWRBTN_EN)—R/W. 1=Enable the generation of an SMI# or SCI on
setting the STS bit. 0=Disable. The PWRBTN# signal is always enabled to generate resume events.
7:6 Reserved.
5 Global Enable (GBL_EN)—R/W. 1=Enable SCI generation upon setting of the GBL_STS bit.
0=Disable.
4:1 Reserved.
0 Power Management Timer (TMROF_EN)—R/W. 1=Enable SCI generation upon setting of the
TMROF_STS bit. 0=Disable.
7.2.3. PMCNTRL—POWER MANAGEMENT CONTROL REGISTER (IO)
I/O Address:
Default Value:
Attribute:
Base + (04h)
0000h
Read/Write
Bit
Description
15:14
13
12:10
Reserved.
Suspend Enable (SUS_EN)—R/W. This is a write-only bit and reads to it always return a 0. Writing
this bit to a 1 causes the system to automatically sequence into the suspend state defined by the
SUS_TYP field. This bit corresponds to the SLP_EN bit in ACPI specification.
Suspend Type (SUS_TYP)—R/W. Specifies the type of hardware suspend mode the system should
enter when the SUS_EN bit is set. This field is decoded as follows:
Bits[12:10] Suspend Type
000
Soff/STD (Soft OFF or Suspend to Disk)
001
STR (Suspend To RAM)
010
POSCL (Powered On Suspend, Context Lost)
011
POSCCL (Powered On Suspend, CPU Context Lost)
100
POS (Powered On Suspend, Context Maintained)
101
Working (Clock Control)
110
Reserved
111
Reserved
The SUS_TYP field may also be used by the BIOS and OS code to determine the type of suspend
state the system is resuming from. Before entering any low power clock control state (LVL2 or
LVL3), this field should be programmed to the Working state (101). This does not cause any action
by PIIX4, but is for information storage only.
138
PRELIMINARY
4/9/97 2:23 PM PIIX4aDS
INTEL CONFIDENTIAL
(until publication date)