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82371AB Datasheet, PDF (113/284 Pages) Intel Corporation – PCI-TO-ISA / IDE XCELERATOR PIIX4
E
82371AB (PIIX4)
6.2.4. FRNUM—FRAME NUMBER REGISTER (IO)
I/O Address:
Default Value:
Attribute:
Base + (06−07h)
0000h
Read/Write (Writes must be Word Writes)
Bits [10:0] of this register contain the current frame number which is included in the frame SOF packet. This
register reflects the count value of the internal frame number counter. Bits [9:0] are used to select a particular
entry in the Frame List during schedule execution. This register is updated at the end of each frame time.
This register must be written as a word. Byte writes are not supported. This register cannot be written unless the
Host Controller is in the STOPPED state as indicated by the HCHalted bit (USBSTS register). A write to this
register while the Run/Stop bit is set (USBCMD register) is ignored.
Bit
Description
15:11 Reserved.
10:0 Frame List Current Index/Frame Number. Bits [10:0] provide the frame number in the SOF Frame.
The value in this register increments at the end of each time frame (approximately every
1 ms). In addition, bits [9:0] are used for the Frame List current index and correspond to memory
address signals [11:2].
6.2.5. FLBASEADD—FRAME LIST BASE ADDRESS REGISTER (IO)
I/O Address:
Default Value:
Attribute:
Base + (08−0Bh)
Undefined
Read/Write
This 32-bit register contains the beginning address of the Frame List in the system memory. HCD loads this
register prior to starting the schedule execution by the Host Controller. When written, only the upper 20 bits are
used. The lower 12 bits are written as 0 (4-Kbyte alignment). The contents of this register are combined with the
frame number counter to enable the Host Controller to step through the Frame List in sequence. The two least
significant bits are always 00. This requires DWord alignment for all list entries. This configuration supports
1,024 Frame List entries.
Bit
Description
31:12 Base Address. These bits correspond to memory address signals [31:12], respectively.
11:0 Reserved. Must be written as 0s.
PRELIMINARY
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