82371AB Datasheet, PDF (14/284 Pages) Intel Corporation – PCI-TO-ISA / IDE XCELERATOR PIIX4

82371AB (PIIX4)
E
RTC
PIIX4 contains a Motorola* MC146818A-compatible real-time clock with 256 bytes of battery-backed RAM. The
real-time clock performs two key functions: keeping track of the time of day and storing system data, even when
the system is powered down. The RTC operates on a 32.768-kHz crystal and a separate 3V lithium battery that
provides up to 7 years of protection.
The RTC also supports two lockable memory ranges. By setting bits in the configuration space, two 8-byte
ranges can be locked to read and write accesses. This prevents unauthorized reading of passwords or other
system security information.
The RTC also supports a date alarm, that allows for scheduling a wake up event up to 30 days in advance,
rather than just 24 hours in advance.
GPIO and Chip Selects
Various general purpose inputs and outputs are provided for custom system design. The number of inputs and
outputs varies depending on PIIX4 configuration. Two programmable chip selects are provided which allows the
designer to place devices on the X-Bus without the need for external decode logic.
Pentium^® and Pentium^® II Processor Interface
The PIIX4 CPU interface allows connection to all Pentium and Pentium II processors. The Sleep mode for the
Pentium II processors is also supported.
Enhanced Power Management
PIIX4’s power management functions include enhanced clock control, local and global monitoring support for 14
individual devices, and various low-power (suspend) states, such as Power-On Suspend, Suspend-to-DRAM,
and Suspend-to-Disk. A hardware-based thermal management circuit permits software-independent entrance to
low-power states. PIIX4 has dedicated pins to monitor various external events (e.g., interfaces to a notebook lid,
suspend/resume button, battery low indicators, etc.). PIIX4 contains full support for the Advanced Configuration
and Power Interface (ACPI) Specification.
System Management Bus (SMBus)
PIIX4 contains an SMBus Host interface that allows the CPU to communicate with SMBus slaves and an SMBus
Slave interface that allows external masters to activate power management events.
Configurability
PIIX4 provides a wide range of system configuration options. This includes full 16-bit I/O decode on internal
modules, dynamic disable on all the internal modules, various peripheral decode options, and many options on
system configuration.
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