82371AB Datasheet, PDF (216/284 Pages) Intel Corporation – PCI-TO-ISA / IDE XCELERATOR PIIX4

82371AB (PIIX4)
E
11.3.5.2.
Device 1: IDE Primary Drive 1
Device 1 monitors the Primary IDE device, drive 1 and GPI5. The IDE device DRV bit (bit 4 of port
1F6h) is shadowed to determine if drive 1 is active on the primary connector.
Device 1 System Events:
— PCI accesses to IO address 1F0–1F7h, 3F6h, independent of IDE enable in PCI
function 1, if IDE drive 1 is active. This can cause idle, burst or global standby timer
reloads or IO trap SMI#.
— PDDACK# assertion if primary IDE drive 1 is active, the IDE interface is configured as
primary and secondary and BMIDE is active for primary channel. This can cause only
idle, burst, and global standby timer reloads.
— Assertion of GPI5. The polarity of active signal (high or low) is selectable. This can
cause idle, burst, or global standby timer reloads or IO trap SMI#.
Device 1 Idle Timer:
Resolution: 1 second or 8 second
Count: 4 bit
GPI Enable:
GPI Polarity Select:
Device 1 Idle Timer Reload:
Global Standby Timer Reload:
Burst Timer Reload:
Fast or Slow Burst Select:
Idle Timer Expiration SMI#:
Trap SMI#:
[IDL_SEL_DEV1]
[IDL_CNTA]
[GPI_EN_DEV1]
[GPI_POL_DEV1]
[IDL_EN_DEV1]
[GRLD_EN_DEV1]
[BRLD_EN_DEV1]
[BRLD_SEL_DEV1]
[IDL_EN_DEV1] [IDL_STS_DEV1]
[TRP_EN_DEV1] [TRP_STS_DEV1]
11.3.5.3.
Device 2: IDE Secondary Drive 0
Device 2 monitors the Secondary IDE device, drive 0 and GPI6. The IDE device DRV bit (bit 4 of port
176h) is shadowed to determine if drive 0 is active on the secondary connector.
Device 2 System Events:
— PCI accesses to IO address 170–177h, 376h, independent of IDE enable in PCI
function 1, if secondary IDE drive 0 is active. This can cause idle, burst, or global
standby timer reloads or IO trap SMI#.
— SDDACK# assertion if secondary IDE drive 0 is active, the IDE interface is configured
as primary and secondary and BMIDE is active for secondary channel. This can cause
only idle, burst, and global standby timer reloads.
— Assertion of GPI6. The polarity of active signal (high or low) is selectable. This can
cause idle, burst, or global standby timer reloads or IO trap SMI#.
Device 2 Idle Timer:
Resolution: 1 second or 8 second
Count: 4 bit
GPI Enable:
GPI Polarity Select:
Device 2 Idle Timer Reload:
Global Standby Timer Reload:
Burst Timer Reload:
Fast or Slow Burst Select:
Idle Timer Expiration SMI#:
Trap SMI#:
[IDL_SEL_DEV2]
[IDL_CNTA]
[GPI_EN_DEV2]
[GPI_POL_DEV2]
[IDL_EN_DEV2]
[GRLD_EN_DEV2]
[BRLD_EN_DEV2]
[BRLD_SEL_DEV2]
[IDL_EN_DEV2] [IDL_STS_DEV2]
[TRP_EN_DEV2] [TRP_STS_DEV2]
216
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