82371AB Datasheet, PDF (155/284 Pages) Intel Corporation – PCI-TO-ISA / IDE XCELERATOR PIIX4

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82371AB (PIIX4)
Table 18. DMA and ISA Master Accesses to Main Memory
Memory Space
Response
Top of main memory to 128 Mbytes
Confine to ISA
1 Mbyte to top of main memory
Forward to PCI¹
1 Mbyte minus 128 Kbytes to 1 Mbyte minus 64 Kbytes
Confine to ISA²
640 Kbytes to 1 Mbyte minus 128 Kbytes
Confine to ISA
512–640 Kbytes
Confine to ISA³
0–512 Kbytes
Forward to PCI
NOTES:
1. Except accesses to programmed memory hole.
2. Forward to main memory if bit 6=0 in the XBCS Register and bit 3=1 in the TOM Register.
3. Forward to main memory if bit 1=0 in the TOM Register.
8.1.3. BIOS MEMORY
PIIX4 supports 1 Mbyte of BIOS memory space. This includes the normal 128-Kbyte space plus an additional
384 Kbyte (extended BIOS space) and 512 Kbyte of BIOS space (1M extended BIOS area). The XBCS Register
provides BIOS space access control. Access to the lower 64-Kbyte block of the 128-Kbyte space and both
extended BIOS spaces can be individually enabled or disabled. In addition, write protection can be programmed
for the entire BIOS space.
PCI Access to BIOS Memory
The 128-Kbyte BIOS memory space is located at 000E0000–000FFFFFh (top of 1 Mbyte) and is aliased at
FFFE0000h (top of 4 Gbytes). This 128-Kbyte block is split into two 64-Kbyte blocks. Accesses to the top
64 Kbytes (000F0000–000FFFFFh) and its aliased region (FFFF0000–FFFFFFFFh) are always forwarded to the
ISA Bus and BIOSCS# is always generated. Accesses to the bottom 64 Kbytes (000E0000–000EFFFFh) are
forwarded to the ISA Bus and BIOSCS# is only generated when this BIOS region is enabled (bit 6=1 in the
XBCS Register). If this BIOS region is enabled, accesses to the aliased region at the top of 4 Gbytes
(FFFE0000h–FFFEFFFFh) are also forwarded to ISA and BIOSCS# generated. If disabled, these accesses are
not forwarded to ISA and BIOSCS# is not generated.
The extended BIOS space resides at FFF80000–FFFDFFFFh. If this BIOS region is enabled (bit 7=1 in the
XBCS Register), these accesses are forwarded to ISA and BIOSCS# generated. The 1M extended BIOS space
resides at FFF00000–FFF7FFFFh. If this BIOS region is enabled (bit 9=1 in the XBCS Register), these
accesses are forwarded to ISA and BIOSCS# generated. If disabled, these accesses are not forwarded to ISA
and BIOSCS# not generated. Table 19 shows the BIOS Memory Map.
PIIX4 provides a bit in the XBCS register (bit 2) that when set to 0, prevents BIOSCS# from being asserted
during BIOS memory write accesses to the decoded BIOS region. When set to 1, BIOSCS# is asserted for
memory read and write accesses to the decoded BIOS region. This bit defaults to 0 (BIOS write protected)
at reset.
PCI accesses to enabled BIOS memory are always positively decoded, regardless of the status of the
Positive/Subtractive Decode Configuration bit (bit 1, Function 0 PCI address B0h).
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