MC3S12RG128 Datasheet, PDF (91/546 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 2 Port Integration Module (PIM3RG128V1) Block Description
2.3.2.3.4 Port M Reduced Drive Register (RDRM)
Module Base + 0x_0013
R
W
Reset
7
RDRM7
0
6
RDRM6
5
RDRM5
4
RDRM4
3
RDRM3
2
RDRM2
0
0
0
0
0
Figure 2-19. Port M Reduced Drive Register (RDRM)
1
RDRM1
0
0
RDRM0
0
Read: Anytime.
Write: Anytime.
This register configures the drive strength of each port M output pin as either full or reduced. If the port is
used as input this bit is ignored.
Table 2-14. RDRM Field Descriptions
Field
Description
7–0
Reduced Drive Port M Bits
RDRM[7:0] 0 Full drive strength at output.
1 Associated pin drives at about 1/3 of the full drive strength.
2.3.2.3.5 Port M Pull Device Enable Register (PERM)
Module Base + 0x_0014
R
W
Reset
7
PERM7
0
6
PERM6
0
5
PERM5
0
4
PERM4
0
3
PERM3
0
2
PERM2
0
1
PERM1
0
0
PERM0
0
Figure 2-20. Port M Pull Device Enable Register (PERM)
Read: Anytime.
Write: Anytime.
This register configures whether a pull-up or a pull-down device is activated, if the port is used as input or
wired-OR output. This bit has no effect if the port is used as push-pull output. Out of reset no pull device
is enabled.
Table 2-15. PERM Field Descriptions
Field
Description
7–0
Pull Device Enable Port M Bits
PERM[7:0] 0 Pull-up or pull-down device is disabled.
1 Either a pull-up or pull-down device is enabled.
MC3S12RG128 Data Sheet, Rev. 1.05
Freescale Semiconductor
91