MC3S12RG128 Datasheet, PDF (231/546 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 8 Analog-to-Digital Converter (ATD10B8CV3)
8.3.2.8 Reserved Register (ATDTEST0)
Module Base + 0x0008
7
6
5
4
3
2
1
0
R
U
U
U
U
U
U
U
U
W
Reset
1
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 8-10. Reserved Register (ATDTEST0)
Read: Anytime, returns unpredictable values
Write: Anytime in special modes, unimplemented in normal modes
NOTE
Writing to this register when in special modes can alter functionality.
8.3.2.9 ATD Test Register 1 (ATDTEST1)
This register contains the SC bit used to enable special channel conversions.
Module Base + 0x0009
7
6
5
4
3
2
R
U
U
0
0
0
0
W
Reset
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 8-11. ATD Test Register 1 (ATDTEST1)
Read: Anytime, returns unpredictable values for Bit7 and Bit6
Write: Anytime
Table 8-18. ATDTEST1 Field Descriptions
1
0
0
SC
0
0
Field
0
SC
Description
Special Channel Conversion Bit — If this bit is set, then special channel conversion can be selected using CC,
CB and CA of ATDCTL5. Table 8-19 lists the coding.
0 Special channel conversions disabled
1 Special channel conversions enabled
Note: Always write remaining bits of ATDTEST1 (Bit7 to Bit1) zero when writing SC bit. Not doing so might result
in unpredictable ATD behavior.
MC3S12RG128 Data Sheet, Rev. 1.05
Freescale Semiconductor
231