MC3S12RG128 Datasheet, PDF (53/546 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 1 Device Overview (MC3S12RG128V1)
Table 1-4. Signal Properties Summary (Sheet 3 of 3)
Pin
Name
Function 1
Pin
Name
Function 2
Pin
Name
Function 3
Pin
Name
Function 4
Pin
Name
Function 5
Power
Supply
Internal Pull
Resistor
CTRL
Reset
State
Description
PM0
RXCAN0
—
—
—
V_DDX PERM/ Disabled Port M I/O, RX of CAN0
PPSM
PP7
KWP7
PWM7
—
—
V_DDX
PERP/ Disabled Port P I/O, Interrupt,
PPSP
Channel 7 of PWM
PP6
KWP6
PWM6
—
—
V_DDX
PERP/ Disable Port P I/O, Interrupt,
PPSP
d Channel 6 of PWM
PP5
KWP5
PWM5
—
—
V_DDX
PERP/ Disabled Port P I/O, Interrupt,
PPSP
Channel 5 of PWM
PP4
KWP4
PWM4
—
—
V_DDX
PERP/ Disabled Port P I/O, Interrupt,
PPSP
Channel 4 of PWM
PP3
KWP3
PWM3
SS1
—
V_DDX
PERP/ Disabled Port P I/O, Interrupt,
PPSP
Channel 3 of PWM, SS of
SPI1
PP2
KWP2
PWM2
SCK1
—
V_DDX
PERP/ Disabled Port P I/O, Interrupt,
PPSP
Channel 2 of PWM, SCK of
SPI1
PP1
KWP1
PWM1 MOSI1
—
V_DDX
PERP/ Disabled Port P I/O, Interrupt,
PPSP
Channel 1 of PWM, MOSI of
SPI1
PP0
KWP0
PWM0 MISO1
—
V_DDX
PERP/ Disabled Port P I/O, Interrupt,
PPSP
Channel 0 of PWM, MISO of
SPI1
PS7
SS0
—
—
—
V_DDX
PERS/
Up Port S I/O, SS of SPI0
PPSS
PS6
SCK0
—
—
—
V_DDX
PERS/
Up Port S I/O, SCK of SPI0
PPSS
PS5
MOSI0
—
—
—
V_DDX
PERS/
Up Port S I/O, MOSI of SPI0
PPSS
PS4
MISO0
—
—
—
V_DDX
PERS/
Up Port S I/O, MISO of SPI0
PPSS
PS3
TXD1
—
—
—
V_DDX
PERS/
Up Port S I/O, TXD of SCI1
PPSS
PS2
RXD1
—
—
—
V_DDX
PERS/
Up Port S I/O, RXD of SCI1
PPSS
PS1
TXD0
—
—
—
V_DDX
PERS/
Up Port S I/O, TXD of SCI0
PPSS
PS0
RXD0
—
—
—
V_DDX
PERS/
Up Port S I/O, RXD of SCI0
PPSS
PT[7:0] IOC[7:0]
—
—
—
V_DDX
PERT/ Disabled Port T I/O, Timer channels
PPST
1 _{Refer to PEAR register description in HCS12 Multiplexed External Bus Interface (MEBI) Block Guide.}
MC3S12RG128 Data Sheet, Rev. 1.05
Freescale Semiconductor
53