MC3S12RG128 Datasheet, PDF (76/546 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 2 Port Integration Module (PIM3RG128V1) Block Description
Table 2-1. Pin Functions and Priorities (Sheet 4 of 4)
Port
Pin Name
Pin Function
and Priority
Description
Pin Function
after Reset
Port J
PJ7
TXCAN4
MSCAN4 transmit pin
GPIO
SCL
Inter Integrated Circuit serial clock line
TXCAN0
MSCAN0 transmit pin
GPIO/KWJ7 General-purpose I/O with interrupt
PJ6
RXCAN4
MSCAN4 receive pin
SDA
Inter Integrated Circuit serial data line
RXCAN0
MSCAN0 receive pin
GPIO/KWJ6 General-purpose I/O with interrupt
PJ[1:0] GPIO/KWJ[1:0] General-purpose I/O with interrupt
1 _{If CAN0 is routed to PM[3:2] the SPI0 can still be used in bidirectional master mode. Refer to SPI Block Guide for details.}
2.3 Memory Map and Registers
This section provides a detailed description of all registers.
2.3.1 Module Memory Map
Figure 2-2 shows the register map of the Port Integration Module.
Address
0x0000
0x0001
0x0002
0x0003
0x0004
0x0005
0x0006
0x0007
0x0008
Name
PTT
PTIT
DDRT
RDRT
PERT
PPST
Reserved
Reserved
PTS
Bit 7
R
PTT7
W
R PTIT7
W
R
DDRT7
W
R
RDRT7
W
R
PERT7
W
R
PPST7
W
R
W
R
W
R
PTS7
W
6
PTT6
PTIT6
5
PTT5
PTIT5
4
PTT4
PTIT4
3
PTT3
PTIT3
2
PTT2
PTIT2
DDRT6 DDRT5 DDRT4 DDRT3 DDRT2
RDRT6 RDRT5 RDRT4 RDRT3 RDRT2
PERT6 PERT5 PERT4 PERT3 PERT2
PPST6 PPST5 PPST4 PPST3 PPST2
PTS6
PTS5
PTS4
PTS3
PTS2
= Unimplemented or Reserved
Figure 2-2. PIM Register Summary (Sheet 1 of 3)
1
PTT1
PTIT1
DDRT1
RDRT1
PERT1
PPST1
PTS1
Bit 0
PTT0
PTIT0
DDRT0
RDRT0
PERT0
PPST0
PTS0
MC3S12RG128 Data Sheet, Rev. 1.05
76
Freescale Semiconductor