MC3S12RG128 Datasheet, PDF (80/546 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 2 Port Integration Module (PIM3RG128V1) Block Description
2.3.2.1 Port T Registers
2.3.2.1.1 Port T I/O Register (PTT)
Module Base + 0x_0000
R
W
ECT:
Reset
7
PTT7
IOC7
0
6
PTT6
IOC6
0
5
PTT5
4
PTT4
3
PTT3
2
PTT2
IOC5
IOC4
IOC3
IOC2
0
0
0
0
Figure 2-3. Port T I/O Register (PTT)
1
PTT1
IOC1
0
0
PTT0
IOC0
0
Read: Anytime.
Write: Anytime.
If the data direction bits of the associated I/O pins are set to 1, a read returns the value of the port register,
otherwise the value at the pins is read.
2.3.2.1.2 Port T Input Register (PTIT)
Module Base + 0x_0001
R
W
Reset
7
PTIT7
—
6
PTIT6
5
PTIT5
4
PTIT4
3
PTIT3
2
PTIT2
—
—
—
—
—
= Unimplemented or Reserved
Figure 2-4. Port T Input Register (PTIT)
1
PTIT1
—
0
PTIT0
—
Read: Anytime.
Write: Never, writes to this register have no effect.
This register always reads back the status of the associated pins. This can also be used to detect overload
or short circuit conditions on output pins.
MC3S12RG128 Data Sheet, Rev. 1.05
80
Freescale Semiconductor