MC3S12RG128 Datasheet, PDF (206/546 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 7 Breakpoint Module (BKPV1) Block Description
7.3.1.2 Breakpoint Control Register 1 (BKPCT1)
Module Base + 0x0029
7
R
BK0MBH
W
Reset
0
6
BK0MBL
5
BK1MBH
4
BK1MBL
3
BK0RWE
2
BK0RW
0
0
0
0
0
Figure 7-4. Breakpoint Control Register 1 (BKPCT1)
1
BK1RWE
0
0
BK1RW
0
Read: Anytime
Write: Anytime
This register is used to configure the functionality of the Breakpoint sub-block within the Core.
Table 7-3. BKPCT1 Field Descriptions
Field
Description
7–6
BK0MBH
BK0MBL
5–4
BK1MBH
BK1MBL
3
BK0RWE
Breakpoint Mask High Byte and Low Byte for First Address — In Dual or Full Mode, these bits may be used
to mask (disable) the comparison of the high and low bytes of the first address breakpoint. The functionality is as
given in Table 7-4 below.
The x:0 case is for a Full Address Compare. When a program page is selected, the full address compare will be
based on bits for a 20-bit compare. The registers used for the compare are {BKP0X[5:0], BKP0H[5:0],
BKP0L[7:0]}. When a program page is not selected, the full address compare will be based on bits for a 16-bit
compare. The registers used for the compare are {BKP0H[7:0], BKP0L[7:0]}.
The 1:0 case is not sensible because it would ignore the high order address and compare the low order and
expansion addresses. Logic forces this case to compare all address lines (effectively ignoring the BK0MBH
control bit).
The 1:1 case is useful for triggering a breakpoint on any access to a particular expansion page. This only makes
sense if a program page is being accessed so that the breakpoint trigger will occur only if BKP0X compares.
Breakpoint Mask High Byte and Low Byte of Data (Second Address) — In Dual Mode, these bits may be
used to mask (disable) the comparison of the high and/or low bytes of the second address breakpoint. The
functionality is as given in Table 7-5.
The x:0 case is for a Full Address Compare. When a program page is selected, the full address compare will be
based on bits for a 20-bit compare. The registers used for the compare are {BKP1X[5:0], BKP1H[5:0],
BKP1L[7:0]}. When a program page is not selected, the full address compare will be based on bits for a 16-bit
compare. The registers used for the compare are {BKP1H[7:0], BKP1L[7:0]}.
The 1:0 case is not sensible because it would ignore the high order address and compare the low order and
expansion addresses. Logic forces this case to compare all address lines (effectively ignoring the BK1MBH
control bit).
The 1:1 case is useful for triggering a breakpoint on any access to a particular expansion page. This only makes
sense if a program page is being accessed so that the breakpoint trigger will occur only if BKP1X compares.
In Full Mode, these bits may be used to mask (disable) the comparison of the high and/or low bytes of the data
breakpoint. The functionality is as given in Table 7-6.
R/W Compare Enable — Enables the comparison of the R/W signal for first address breakpoint. This bit is not
useful in tagged breakpoints.
0 R/W is not used in the comparisons
1 R/W is used in comparisons
MC3S12RG128 Data Sheet, Rev. 1.05
206
Freescale Semiconductor