MC3S12RG128 Datasheet, PDF (457/546 Pages) Freescale Semiconductor, Inc – Microcontrollers

16.4.3 Transmitter
Chapter 16 Serial Communications Interface (SCIV2) Block Description
INTERNAL BUS
BUS
CLOCK
BAUD DIVIDER
÷ 16
SCI DATA REGISTERS
SBR12–SBR0
11-BIT TRANSMIT SHIFT REGISTER
M
H876543210L
TXD
T8
PE
PARITY
PT
GENERATION
LOOP
CONTROL
TO
RXD
LOOPS
RSRC
TRANSMITTER CONTROL
TDRE INTERRUPT REQUEST
TC INTERRUPT REQUEST
TDRE
TIE
TE
SBK
TC
TCIE
Figure 16-11. Transmitter Block Diagram
16.4.3.1 Transmitter Character Length
The SCI transmitter can accommodate either 8-bit or 9-bit data characters. The state of the M bit in SCI
control register 1 (SCICR1) determines the length of data characters. When transmitting 9-bit data, bit T8
in SCI data register high (SCIDRH) is the ninth bit (bit 8).
16.4.3.2 Character Transmission
To transmit data, the MCU writes the data bits to the SCI data registers (SCIDRH/SCIDRL), which in turn
are transferred to the transmitter shift register. The transmit shift register then shifts a frame out through
the Tx output signal, after it has prefaced them with a start bit and appended them with a stop bit. The SCI
data registers (SCIDRH and SCIDRL) are the write-only buffers between the internal data bus and the
transmit shift register.
The SCI also sets a flag, the transmit data register empty flag (TDRE), every time it transfers data from
the buffer (SCIDRH/L) to the transmitter shift register.The transmit driver routine may respond to this flag
MC3S12RG128 Data Sheet, Rev. 1.05
Freescale Semiconductor
457