MC3S12RG128 Datasheet, PDF (52/546 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 1 Device Overview (MC3S12RG128V1)
Table 1-4. Signal Properties Summary (Sheet 2 of 3)
Pin
Name
Function 1
Pin
Name
Function 2
Pin
Name
Function 3
Pin
Name
Function 4
Pin
Name
Function 5
Power
Supply
PH7
KWH7
—
PH6
KWH6
—
PH5
KWH5
—
PH4
KWH4
—
PH3
KWH3
SS1
PH2
KWH2
SCK1
PH1
KWH1
MOSI1
PH0
KWH0
MISO1
PJ7
KWJ7 TXCAN4
PJ6
KWJ6 RXCAN4
PJ[1:0] KWJ[1:0]
—
PK7
ECS ROMCTL
PK[5:0] XADDR[19: —
14]
PM7
TXCAN4
—
—
—
—
—
—
—
—
—
SCL
SDA
—
—
—
—
—
V_DDR
—
V_DDR
—
V_DDR
—
V_DDR
—
V_DDR
—
V_DDR
—
V_DDR
—
V_DDR
TXCAN0 V_DDX
RXCAN0 V_DDX
—
V_DDX
—
V_DDX
—
V_DDX
—
V_DDX
PM6
RXCAN4
—
—
—
V_DDX
PM5
PM4
PM3
PM2
PM1
TXCAN0 TXCAN4 SCK0
RXCAN0 RXCAN4 MOSI0
TXCAN1 TXCAN0
SS0
RXCAN1 RXCAN0 MISO0
TXCAN0
—
—
—
V_DDX
—
V_DDX
—
V_DDX
—
V_DDX
—
V_DDX
Internal Pull
Resistor
CTRL
Reset
State
Description
PERH/
PPSH
PERH/
PPSH
PERH/
PPSH
Disable Port H I/O, Interrupt
d
Disable Port H I/O, Interrupt
d
Disable Port H I/O, Interrupt
d
PERH/
PPSH
PERH/
PPSH
PERH/
PPSH
PERH/
PPSH
Disable Port H I/O, Interrupt
d
Disable Port H I/O, Interrupt, SS of
d SPI1
Disable Port H I/O, Interrupt, SCK
d of SPI1
Disable Port H I/O, Interrupt, MOSI
d of SPI1
PERH/
PPSH
Disable Port H I/O, Interrupt, MISO
d of SPI1
PERJ/
PPSJ
PERJ/
PPSJ
PERJ/
PPSJ
PUCR/
PUPKE
Up Port J I/O, Interrupt, TX of
CAN4, SCL of IIC
Up Port J I/O, Interrupt, RX of
CAN4, SDA of IIC
Up Port J I/O, Interrupts
Up Port K I/O, Emulation Chip
Select, ROM Control
PUCR/
PUPKE
PERM/
PPSM
Up Port K I/O, Extended
Addresses
Disable Port M I/O, BF slot
d mismatch pulse, TX of
CAN4
PERM/
PPSM
PERM/
PPSM
Disable Port M I/O, BF illegal
d pulse/message format
error pulse, RX of CAN4
Disabled Port M I/O, TX of CAN0,
CAN4, SCK of SPI0
PERM/
PPSM
PERM/
PPSM
PERM/
PPSM
PERM/
PPSM
Disabled Port M I/O, RX of CAN0,
CAN4, MOSI of SPI0
Disabled Port M I/O, CAN0, SS of
SPI0
Disabled Port M I/O, CAN0, MISO of
SPI0
Disabled Port M I/O, TX of CAN0
MC3S12RG128 Data Sheet, Rev. 1.05
52
Freescale Semiconductor