MC3S12RG128 Datasheet, PDF (82/546 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 2 Port Integration Module (PIM3RG128V1) Block Description
2.3.2.1.4 Port T Reduced Drive Register (RDRT)
Module Base + 0x_0003
R
W
Reset
7
RDRT7
0
6
RDRT6
5
RDRT5
4
RDRT4
3
RDRT3
2
RDRT2
0
0
0
0
0
Figure 2-6. Port T Reduced Drive Register (RDRT)
1
RDRT1
0
0
RDRT0
0
Read: Anytime.
Write: Anytime.
This register configures the drive strength of each port T output pin as either full or reduced. If the port is
used as input this bit is ignored.
Table 2-4. RDRT Field Descriptions
Field
Description
7–0
Reduced Drive Port T Bits
RDRT[7:0] 0 Full drive strength at output.
1 Associated pin drives at about 1/3 of the full drive strength.
2.3.2.1.5 Port T Pull Device Enable Register (PERT)
Module Base + 0x_0004
R
W
Reset
7
PERT7
0
6
PERT6
5
PERT5
4
PERT4
3
PERT3
2
PERT2
0
0
0
0
0
Figure 2-7. Port T Pull Device Enable Register (PERT)
1
PERT1
0
0
PERT0
0
Read: Anytime.
Write: Anytime.
This register configures whether a pull-up or a pull-down device is activated, if the port is used as input.
This bit has no effect if the port is used as output. Out of reset no pull device is enabled.
Table 2-5. PERT Field Descriptions
Field
Description
7–0
Pull Device Enable Port T Bits
PERT[7:0] 0 Pull-up or pull-down device is disabled.
1 Either a pull-up or pull-down device is enabled.
MC3S12RG128 Data Sheet, Rev. 1.05
82
Freescale Semiconductor