MC3S12RG128 Datasheet, PDF (535/546 Pages) Freescale Semiconductor, Inc – Microcontrollers

Appendix A Electrical Characteristics
Table A-23. Expanded Bus Timing Characteristics In 5V Range
Conditions are shown in Table A-4 unless otherwise noted, C_LOAD = 50pF.
Supply Voltage 5V-10% <= V_DDX <=5V+10%
Num C
Rating
Symbol
Min
Typ
1 P Frequency of operation (E-clock)
2 P Cycle time
3 D Pulse width, E low
4 D Pulse width, E high¹
5 D Address delay time
6 D Address valid time to E rise (PW_EL–t_AD)
7 D Muxed address hold time
8 D Address hold to data valid
9 D Data hold to address
10 D Read data setup time
11 D Read data hold time
12 D Write data delay time
13 D Write data hold time
14 D Write data setup time¹ (PW_EH–t_DDW)
15 D Address access time¹ (t_cyc–t_AD–t_DSR)
16 D E high access time¹ (PW_EH–t_DSR)
20 D Chip select delay time
21 D Chip select access time¹ (t_cyc–t_CSD–t_DSR)
22 D Chip select hold time
23 D Chip select negated time
24 D Read/write delay time
25 D Read/write valid time to E rise (PW_EL–t_RWD)
26 D Read/write hold time
27 D Low strobe delay time
28 D Low strobe valid time to E rise (PW_EL–t_LSD)
29 D Low strobe hold time
30 D NOACC strobe delay time
31 D NOACC valid time to E rise (PW_EL–t_NOD)
32 D NOACC hold time
33 D IPIPE[1:0] delay time
34 D IPIPE[1:0] valid time to E rise (PW_EL–t_P0D)
35 D IPIPE[1:0] delay time¹ (PW_EH-t_P1V)
36 D IPIPE[1:0] valid time to E fall
f_o
0
t_cyc
40
PW_EL
19
PW_EH
19
t_AD
t_AV
11
t_MAH
2
t_AHDS
7
t_DHA
2
t_DSR
13
t_DHR
0
t_DDW
t_DHW
2
t_DSW
12
t_ACCA
19
t_ACCE
6
t_CSD
t_ACCS
11
t_CSH
2
t_CSN
8
t_RWD
t_RWV
14
t_RWH
2
t_LSD
t_LSV
14
t_LSH
2
t_NOD
t_NOV
14
t_NOH
2
t_P0D
2
t_P0V
11
t_P1D
2
t_P1V
11
Max
Unit
25.0
MHz
ns
ns
ns
8
ns
ns
ns
ns
ns
ns
ns
7
ns
ns
ns
ns
ns
16
ns
ns
ns
ns
7
ns
ns
ns
7
ns
ns
ns
7
ns
ns
ns
7
ns
ns
25
ns
ns
MC3S12RG128 Data Sheet, Rev. 1.05
Freescale Semiconductor
535