MC3S12RG128 Datasheet, PDF (309/546 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 10 Enhanced Capture Timer (ECT16B8CV1) Block Description
10.3.2.29 Timer Input Capture Holding Registers (TC0H–TC3H)
Module Base + 0x0038–0x0039
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R TC15 TC14 TC13 TC12 TC11 TC10 TC9 TC8 TC7 TC6 TC5 TC4 TC3 TC2 TC1 TC0
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 10-33. Timer Input Capture Holding Register 0 (TC0H)
Module Base + 0x003A–0x003B
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R TC15 TC14 TC13 TC12 TC11 TC10 TC9 TC8 TC7 TC6 TC5 TC4 TC3 TC2 TC1 TC0
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 10-34. Timer Input Capture Holding Register 1 (TC1H)
Module Base + 0x003C–0x003D
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R TC15 TC14 TC13 TC12 TC11 TC10 TC9 TC8 TC7 TC6 TC5 TC4 TC3 TC2 TC1 TC0
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 10-35. Timer Input Capture Holding Register 2 (TC2H)
Module Base + 0x003E–0x003F
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R TC15 TC14 TC13 TC12 TC11 TC10 TC9 TC8 TC7 TC6 TC5 TC4 TC3 TC2 TC1 TC0
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 10-36. Timer Input Capture Holding Register 3 (TC3H)
Read: Anytime
Write: Has no effect.
These registers are used to latch the value of the input capture registers TC0–TC3. The corresponding
IOSn bits in TIOS (0x0000) should be cleared (see Section 10.4.1.1, “IC Channels”).
10.4 Functional Description
This section provides a complete functional description of the ECT block, detailing the operation of the
design from the end user perspective in a number of subsections.
Refer to the Timer Block Diagrams from Figure 10-37 to Figure 10-41 as necessary.
MC3S12RG128 Data Sheet, Rev. 1.05
Freescale Semiconductor
309