MC3S12RG128 Datasheet, PDF (330/546 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 11 Inter-Integrated Circuit (IICV2) Block Description
IBC[7:0]
(hex)
B2
B3
B4
B5
B6
B7
B8
B9
BA
BB
BC
BD
BE
BF
Table 11-5. IIC Divider and Hold Values (Sheet 6 of 6)
SCL Divider
(clocks)
3584
4096
4608
5120
6144
7680
5120
6144
7168
8192
9216
10240
12288
15360
SDA Hold
(clocks)
516
516
772
772
1028
1028
516
516
1028
1028
1540
1540
2052
2052
SCL Hold
(start)
1784
2040
2296
2552
3064
3832
2552
3064
3576
4088
4600
5112
6136
7672
SCL Hold
(stop)
1796
2052
2308
2564
3076
3844
2564
3076
3588
4100
4612
5124
6148
7684
11.3.1.3 IIC Control Register (IBCR)
Offset Module Base + 0x0002
R
W
Reset
7
IBEN
0
6
5
4
3
2
0
IBIE
MS/SL
Tx/Rx
TXAK
RSTA
0
0
0
0
0
= Unimplemented or Reserved
Figure 11-6. IIC Bus Control Register (IBCR)
Read and write anytime
1
0
0
IBSWAI
0
0
MC3S12RG128 Data Sheet, Rev. 1.05
330
Freescale Semiconductor