MC3S12RG128 Datasheet, PDF (202/546 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 7 Breakpoint Module (BKPV1) Block Description
7.1.1 Features
• Full or Dual Breakpoint Mode
— Compare on address and data (Full)
— Compare on either of two addresses (Dual)
• BDM or SWI Breakpoint
— Enter BDM on breakpoint (BDM)
— Execute SWI on breakpoint (SWI)
• Tagged or Forced Breakpoint
— Break just before a specific instruction will begin execution (TAG)
— Break on the first instruction boundary after a match occurs (Force)
• Single, Range, or Page address compares
— Compare on address (Single)
— Compare on address 256 byte (Range)
— Compare on any 16K Page (Page)
• Compare address on read or write on forced breakpoints
• High and/or low byte data compares
7.1.2 Modes of Operation
The Breakpoint sub-block contains two modes of operation:
1. Dual Address Mode, where a match on either of two addresses will cause the system to enter
Background Debug Mode or initiate a Software Interrupt (SWI).
2. Full Breakpoint Mode, where a match on address and data will cause the system to enter
Background Debug Mode or initiate a Software Interrupt (SWI).
7.1.3 Block Diagram
A block diagram of the Breakpoint sub-block is shown in Figure 7-1.
7.2 External Signal Description
The breakpoint sub-module relies on the external bus interface (generally the MEBI) when the breakpoint
is matching on the external bus.
The tag pins in Table 7-1 (part of the MEBI) may also be a part of the breakpoint operation.
Table 7-1. External System Pins Associated With Breakpoint and MEBI
Pin Name
BKGD/MODC/
TAGHI
PE3/LSTRB/
TAGLO
Pin Functions
TAGHI
TAGLO
Description
When instruction tagging is on, a 0 at the falling edge of PE4/ECLK tags the high
half of the instruction word being read into the instruction queue.
In expanded wide mode or emulation narrow modes, when instruction tagging is
on and low strobe is enabled, a 0 at the falling edge of PE4/ECLK tags the low half
of the instruction word being read into the instruction queue.
MC3S12RG128 Data Sheet, Rev. 1.05
202
Freescale Semiconductor