MC3S12RG128 Datasheet, PDF (207/546 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 7 Breakpoint Module (BKPV1) Block Description
Table 7-3. BKPCT1 Field Descriptions (continued)
Field
Description
2
BK0RW
1
BK1RWE
0
BK1RW
R/W Compare Value — When BK0RWE = 1, this bit determines the type of bus cycle to match on first address
breakpoint. When BK0RWE = 0, this bit has no effect.
0 Write cycle will be matched
1 Read cycle will be matched
R/W Compare Enable — In Dual Mode, this bit enables the comparison of the R/W signal to further specify what
causes a match for the second address breakpoint. This bit is not useful on tagged breakpoints or in Full Mode
and is therefore a don’t care.
0 R/W is not used in comparisons
1 R/W is used in comparisons
R/W Compare Value — When BK1RWE = 1, this bit determines the type of bus cycle to match on the second
address breakpoint.When BK1RWE = 0, this bit has no effect.
0 Write cycle will be matched
1 Read cycle will be matched
Table 7-4. Breakpoint Mask Bits for First Address
BK0MBH:BK0MBL
x:0
0:1
1:1
1 _{If page is selected.}
Address Compare
Full address compare
256 byte address range
16K byte address range
BKP0X
Yes¹
Yes¹
Yes¹
BKP0H
Yes
Yes
No
BKP0L
Yes
No
No
Table 7-5. Breakpoint Mask Bits for Second Address (Dual Mode)
BK1MBH:BK1MBL
x:0
0:1
1:1
1 _{If page is selected.}
Address Compare
Full address compare
256 byte address range
16K byte address range
BKP1X
Yes¹
Yes¹
Yes¹
BKP1H
Yes
Yes
No
BKP1L
Yes
No
No
Table 7-6. Breakpoint Mask Bits for Data Breakpoints (Full Mode)
BK1MBH:BK1MBL
Data Compare
BKP1X
0:0
High and low byte compare
No¹
0:1
High byte
No¹
1:0
Low byte
No¹
1:1
No compare
No¹
1 _{Expansion addresses for breakpoint 1 are not available in this mode.}
BKP1H
Yes
Yes
No
No
BKP1L
Yes
No
Yes
No
MC3S12RG128 Data Sheet, Rev. 1.05
Freescale Semiconductor
207