MC3S12RG128 Datasheet, PDF (22/546 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 1 Device Overview (MC3S12RG128V1)
128K Byte or 64K Byte ROM
8K Byte RAM
VDDR
VSSR
VREGEN
VDD1,2
VSS1,2
BKGD
XFC
VDDPLL
VSSPLL
EXTAL
XTAL
RESET
PE0
PE1
PE2
PE3
PE4
PE5
PE6
PE7
TEST
Voltage Regulator
Single-wire Background
Debug Module
CPU12
PLL
Clock and
Reset
Generation
Module
Periodic Interrupt
COP Watchdog
Clock Monitor
Breakpoints
XIRQ
IRQ
R/W
LSTRB
ECLK
MODA
MODB
NOACC/XCLKS
System
Integration
Module
(SIM)
Multiplexed Address/Data Bus
DDRA
PTA
DDRB
PTB
ATD0
VRH
VRL
VDDA
VSSA
ATD1
VRH
VRL
VDDA
VSSA
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
PPAGE
PAD00
AN0
PAD01
AN1
PAD02
AN2
PAD03
AN3
PAD04
AN4
PAD05
AN5
PAD06
AN6
PAD07
AN7
PIX0
PIX1
PIX2
PIX3
PIX4
PIX5
ECS
Enhanced Capture
Timer
IOC0
IOC1
IOC2
IOC3
IOC4
IOC5
IOC6
IOC7
SCI0
SCI1
SPI0
MISO
MOSI
SCK
SS
RXD
TXD
RXD
TXD
CAN0
RXCAN
TXCAN
Multiplexed
Wide Bus
Multiplexed
Narrow Bus
I/O Driver 5V
VDDX
VSSX
PLL 2.5V
VDDPLL
VSSPLL
CAN4
RXCAN
TXCAN
Internal Logic 2.5V
VDD1,2
VSS1,2
IIC
PWM
SDA
SCL
PWM0
PWM1
PWM2
PWM3
PWM4
PWM5
PWM6
PWM7
KWJ0
KWJ1
KWJ6
KWJ7
KWP0
KWP1
KWP2
KWP3
KWP4
KWP5
KWP6
KWP7
A/D Converter 5V &
Voltage Regulator Reference Voltage Regulator 5V & I/O
VDDA
VSSA
VDDR
VSSR
SPI1
MISO
MOSI
SCK
SS
KWH0
KWH1
KWH2
KWH3
KWH4
KWH5
KWH6
KWH7
Figure 1-1. MC3S12RG128 Block Diagram
VRH
VRL
VDDA
VSSA
PAD08
PAD09
PAD10
PAD11
PAD12
PAD13
PAD14
PAD15
PK0
PK1
PK2
PK3
PK4
PK5
PK7
XADDR14
XADDR15
XADDR16
XADDR17
XADDR18
XADDR19
ECS/ROMCTL
PT0
PT1
PT2
PT3
PT4
PT5
PT6
PT7
PS0
PS1
PS2
PS3
PS4
PS5
PS6
PS7
PM0
PM1
PM2
PM3
PM4
PM5
PM6
PM7
PJ0
PJ1
PJ6
PJ7
PP0
PP1
PP2
PP3
PP4
PP5
PP6
PP7
PH0
PH1
PH2
PH3
PH4
PH5
PH6
PH7
MC3S12RG128 Data Sheet, Rev. 1.05
22
Freescale Semiconductor