MC3S12RG128 Datasheet, PDF (167/546 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 5
Interrupt (INTV1) Block Description
5.1 Introduction
This section describes the functionality of the interrupt (INT) sub-block of the S12 core platform.
A block diagram of the interrupt sub-block is shown in Figure 5-1.
INT
WRITE DATA BUS
HPRIO (OPTIONAL)
HIGHEST PRIORITY
I-INTERRUPT
INTERRUPTS
XMASK
IMASK
INTERRUPT INPUT REGISTERS
AND CONTROL REGISTERS
READ DATA BUS
WAKEUP
RESET FLAGS
VECTOR REQUEST
QUALIFIED
INTERRUPTS
PRIORITY DECODER
INTERRUPT PENDING
VECTOR ADDRESS
Figure 5-1. INT Block Diagram
MC3S12RG128 Data Sheet, Rev. 1.05
Freescale Semiconductor
167