MC3S12RG128 Datasheet, PDF (27/546 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 1 Device Overview (MC3S12RG128V1)
1.1.6 Device Register Map
The following tables show the detailed register map of the MC3S12RG128 device.
0x0000–0x000F MEBI map 1 of 3 (HCS12 Multiplexed External Bus Interface
Address
0x0000
0x0001
0x0002
0x0003
0x0004
0x0005
0x0006
0x0007
0x0008
0x0009
0x000A
0x000B
0x000C
0x000D
0x000E
0x000F
Name
PORTA
PORTB
DDRA
DDRB
Reserved
Reserved
Reserved
Reserved
PORTE
DDRE
PEAR
MODE
PUCR
RDRIV
EBICTL
Reserved
Bit 7
R
PA7
W
R
PB7
W
R
DDRA7
W
R
DDRB7
W
R
0
W
R
0
W
R
0
W
R
0
W
R
PE7
W
R
DDRE7
W
R
NOACCE
W
R
MODC
W
R
PUPKE
W
R
RDPK
W
R
0
W
R
0
W
Bit 6
PA6
PB6
DDRA6
DDRB6
0
0
0
0
PE6
DDRE6
0
MODB
0
0
0
0
Bit 5
PA5
PB5
DDRA5
DDRB5
0
0
0
0
PE5
DDRE5
PIPOE
MODA
0
0
0
0
Bit 4
PA4
PB4
DDRA4
DDRB4
0
0
0
0
PE4
DDRE4
NECLK
0
PUPEE
RDPE
0
0
Bit 3
PA3
PB3
DDRA3
DDRB3
0
0
0
0
PE3
DDRE3
LSTRE
IVIS
0
0
0
0
Bit 2
PA2
PB2
DDRA2
DDRB2
0
0
0
0
PE2
DDRE2
RDWE
0
0
0
0
0
Bit 1
PA1
PB1
DDRA1
DDRB1
0
0
0
0
PE1
0
0
EMK
PUPBE
RDPB
0
0
Bit 0
PA 0
PB0
DDRA0
DDRB0
0
0
0
0
PE0
0
0
EME
PUPAE
RDPA
ESTR
0
0x0010–0x0014 MMC map 1 of 4 (HCS12 Module Mapping Control)
Address
0x0010
0x0011
Name
INITRM
INITRG
Bit 7
R
RAM15
W
R
0
W
Bit 6
RAM14
REG14
Bit 5
RAM13
REG13
Bit 4
RAM12
REG12
Bit 3
RAM11
REG11
Bit 2
0
0
Bit 1
0
0
Bit 0
RAMHAL
0
MC3S12RG128 Data Sheet, Rev. 1.05
Freescale Semiconductor
27