MC3S12RG128 Datasheet, PDF (310/546 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 10 Enhanced Capture Timer (ECT16B8CV1) Block Description
BUS CLOCK
P0
P1
P2
P3
P4
P5
P6
P7
TIMCLK
1, 2, ..., 128
PRESCALER
16-BIT FREE-RUNNING
16 BMITAMINATINIMTEIMR ER
PCLK
BUS CLOCK
1, 4, 8, 16
PRESCALER
16-BIT LOAD
REGISTER
16-BIT MODULUS
DOWN COUNTER
PIN
LOGIC
DELAY
COUNTER EDG0
COMPARATOR
TC0 CAPTURE/
COMPARE REGISTER
0 _RESET
PAC0
PIN
LOGIC
DELAY
COUNTER EDG1
TC0H HOLD
REGISTER
COMPARATOR
TC1 CAPTURE/
COMPARE REGISTER
PA0H HOLD
REGISTER
0 _RESET
PAC1
PIN
LOGIC
DELAY
COUNTER EDG2
TC1H HOLD
REGISTER
COMPARATOR
TC2 CAPTURE/
COMPARE REGISTER
PA1H HOLD
REGISTER
0 _RESET
PAC2
PIN
LOGIC
DELAY
COUNTER EDG3
TC2H HOLD
REGISTER
COMPARATOR
TC3 CAPTURE/
COMPARE REGISTER
PA2H HOLD
REGISTER
0 RESET
PAC3
PIN
LOGIC EDG4
EDG0
SH04
PIN
LOGIC EDG5
EDG1
SH15
PIN
LOGIC EDG6
EDG2
MUX
MUX
MUX
TC3H HOLD
REGISTER
COMPARATOR
TC4 CAPTURE/
COMPARE REGISTER
PA3H HOLD
REGISTER
ICLAT, LATQ, BUFEN
(FORCE LATCH)
COMPARATOR
TC5 CAPTURE/
COMPARE REGISTER
WRITE 0X0000
TO MODULUS
COUNTER
COMPARATOR
TC6 CAPTURE/
COMPARE REGISTER
LATQ
(MDC LATCH ENABLE)
SH26
PIN
LOGIC EDG7
EDG3
MUX
COMPARATOR
TC7 CAPTURE/
COMPARE REGISTER
SH37
Figure 10-37. Detailed Timer Block Diagram in Latch Mode
MC3S12RG128 Data Sheet, Rev. 1.05
310
Freescale Semiconductor