MC3S12RG128 Datasheet, PDF (205/546 Pages) Freescale Semiconductor, Inc – Microcontrollers

7.3.1.1
Chapter 7 Breakpoint Module (BKPV1) Block Description
Breakpoint Control Register 0 (BKPCT0)
Module Base + 0x0028
7
6
5
4
3
2
1
0
R
0
0
0
0
BKEN
BKFULL
BKBDM
BKTAG
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 7-3. Breakpoint Control Register 0 (BKPCT0)
Read: Anytime
Write: Anytime
This register is used to set the breakpoint modes.
Table 7-2. BKPCT0 Field Descriptions
Field
7
BKEN
6
BKFULL
4
BKBDM
4
BKTAG
Description
Breakpoint Enable — This bit enables the module
0 Breakpoints disabled
1 Breakpoints enabled, breakpoint mode is determined by bits BKFULL, BKBDM, and BKTAG
Full Breakpoint Mode Enable — This bit controls whether the breakpoint module is in Dual Mode or Full Mode
0 Dual Address Mode enabled
1 Full Breakpoint Mode enabled
Breakpoint Background Debug Mode Enable — This bit determines if the breakpoint causes the system to
enter Background Debug Mode (BDM) or initiate a Software Interrupt (SWI)
0 Go to Software Interrupt on a compare
1 Go to BDM on a compare
Breakpoint on Tag — This bit controls whether the breakpoint will cause a break on the next instruction
boundary (force) or on a match that will be an executable opcode (tagged). Non-executed opcodes cannot cause
a tagged breakpoint
0 On match, break at the next instruction boundary (force)
1 On match, break if the match is an instruction that will be executed (tagged)
MC3S12RG128 Data Sheet, Rev. 1.05
Freescale Semiconductor
205