MC3S12RG128 Datasheet, PDF (480/546 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 17 Serial Peripheral Interface (SPIV3) Block Description
17.3.1 Register Descriptions
This section consists of register descriptions in address order. Each description includes a standard register
diagram with an associated figure number. Details of register bit and field function follow the register
diagrams, in bit order.
Name
0x0000
SPICR1
0x0001
SPICR2
0x0002
SPIBR
0x0003
SPISR
0x0004
Reserved
0x0005
SPIDR
0x0006
Reserved
0x0007
Reserved
7
R
SPIE
W
R
0
W
R
0
W
R SPIF
W
R
W
R
Bit 7
W
R
W
R
W
6
SPE
5
SPTIE
4
MSTR
3
CPOL
2
CPHA
1
SSOE
0
LSBFE
0
0
0
MODFEN BIDIROE
SPISWAI SPC0
0
SPPR2 SPPR1 SPPR0
SPR2
SPR1
SPR0
0
SPTEF MODF
0
0
0
0
6
5
4
3
2
2
Bit 0
= Unimplemented or Reserved
Figure 17-2. SPI Register Summary
17.3.1.1 SPI Control Register 1 (SPICR1)
Module Base 0x0000
R
W
Reset
7
SPIE
0
Read: anytime
Write: anytime
6
SPE
5
SPTIE
4
MSTR
3
CPOL
2
CPHA
0
0
0
0
1
Figure 17-3. SPI Control Register 1 (SPICR1)
1
SSOE
0
0
LSBFE
0
MC3S12RG128 Data Sheet, Rev. 1.05
480
Freescale Semiconductor