MC3S12RG128 Datasheet, PDF (72/546 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 2 Port Integration Module (PIM3RG128V1) Block Description
Optional features:
• Open drain for wired-OR connections
• Interrupt inputs with glitch filtering
2.1.2 Block Diagram
Figure 2-1 is a block diagram of the PIM3RG128.
PH0
PH1
PH2
PH3
PH4
PH5
PH6
PH7
PJ0
PJ1
PJ6
PJ7
PM0
PM1
PM2
PM3
PM4
PM5
PM6
PM7
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PORT INTEGRATION MODULE
SDA
SCL
IIC
RXCAN
TXCAN
CAN4
PWM0
PWM1
PWM2
PWM3
PWM4
PWM5
PWM6
PWM7
RXCAN
TXCAN
CAN0
IOC0
IOC1
IOC2
IOC3
IOC4
IOC5
IOC6
IOC7
MISO
MOSI
SCK
SPI1 _SS
SCI0
RXD
TXD
SCI1
RXD
TXD
MISO
MOSI
SCK
SPI0 _SS
ADDR0/DATA0
ADDR1/DATA1
ADDR2/DATA2
ADDR3/DATA3
ADDR4/DATA4
ADDR5/DATA5
ADDR6/DATA6
ADDR7/DATA7
BKGD/MODC/TAGHI
XIRQ
IRQ
R/W
LSTRB/TAGLO
ECLK
IPIPE0/MODA
IPIPE1/MODB
NOACC/XCLKS
CORE
ADDR8/DATA8
ADDR9/DATA9
ADDR10/DATA10
ADDR11/DATA11
ADDR12/DATA12
ADDR13/DATA13
ADDR14/DATA14
ADDR15/DATA15
XADDR14
XADDR15
XADDR16
XADDR17
XADRR18
XADDR19
ECS/ROMONE
Figure 2-1. PIM3RG128 Block Diagram
MC3S12RG128 Data Sheet, Rev. 1.05
72
PT0
PT1
PT2
PT3
PT4
PT5
PT6
PT7
PP0
PP1
PP2
PP3
PP4
PP5
PP6
PP7
PS0
PS1
PS2
PS3
PS4
PS5
PS6
PS7
BKGD
PE0
PE1
PE2
PE3
PE4
PE5
PE6
PE7
PK0
PK1
PK2
PK3
PK4
PK5
PK7
Freescale Semiconductor