MC3S12RG128 Datasheet, PDF (71/546 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 2
Port Integration Module (PIM3RG128V1) Block Description
2.1 Introduction
The Port Integration Module establishes the interface between the peripheral modules and the I/O pins for
all ports.
NOTE
Port A, B, E, and K are related to the core logic and multiplexed bus
interface. Refer to the HCS12 Core User Guide for details.
This section covers:
• Port T connected to the timer module
• The serial port S associated with 2 SCI and 1 SPI modules
• Port M associated with 2 CAN and 1 SPI modules
• Port P connected to the PWM and 1 SPI modules, which also can be used as an external interrupt
source
• The standard I/O ports H and J associated with the first and fifth CAN module and the IIC interface.
These ports can also be used as external interrupt sources.
Each I/O pin can be configured by several registers in order to select data direction and drive strength, to
enable and select pull-up or pull-down resistors. On certain pins also interrupts can be enabled which result
in status flags.
The I/O’s of two CAN and all two SPI modules can be routed from their default location to determined
pins.
The implementation of the Port Integration Module is device dependent.
2.1.1 Features
A standard port pin has the following minimum features:
• Input/output selection
• 5-V output drive with two selectable drive strengths
• 5-V digital and analog input
• Input with selectable pull-up or pull-down device
MC3S12RG128 Data Sheet, Rev. 1.05
Freescale Semiconductor
71