MC3S12RG128 Datasheet, PDF (86/546 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 2 Port Integration Module (PIM3RG128V1) Block Description
2.3.2.2.4 Port S Reduced Drive Register (RDRS)
Module Base + 0x_000B
R
W
Reset
7
RDRS7
0
6
RDRS6
5
RDRS5
4
RDRS4
3
RDRS3
2
RDRS2
0
0
0
0
0
Figure 2-12. Port S Reduced Drive Register (RDRS)
1
RDRS1
0
0
RDRS0
0
Read: Anytime.
Write: Anytime.
This register configures the drive strength of each port S output pin as either full or reduced. If the port is
used as input this bit is ignored.
Table 2-8. RDRS Field Descriptions
Field
Description
7–0
Reduced Drive Port S Bits
RDRS[7:0] 0 Full drive strength at output.
1 Associated pin drives at about 1/3 of the full drive strength.
2.3.2.2.5 Port S Pull Device Enable Register (PERS)
Module Base + 0x_000C
R
W
Reset
7
PERS7
1
6
PERS6
1
5
PERS5
1
4
PERS4
1
3
PERS3
1
2
PERS2
1
1
PERS1
1
0
PERS0
1
Figure 2-13. Port S Pull Device Enable Register (PERS)
Read: Anytime.
Write: Anytime.
This register configures whether a pull-up or a pull-down device is activated, if the port is used as input or
as output in wired-OR (open drain) mode. This bit has no effect if the port is used as push-pull output. Out
of reset a pull-up device is enabled.
Table 2-9. PERS Field Descriptions
Field
Description
7–0
Pull Device Enable Port S Bits
PERS[7:0] 0 Pull-up or pull-down device is disabled.
1 Either a pull-up or pull-down device is enabled.
MC3S12RG128 Data Sheet, Rev. 1.05
86
Freescale Semiconductor