MC3S12RG128 Datasheet, PDF (111/546 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 2 Port Integration Module (PIM3RG128V1) Block Description
Table 2-43. Pulse Detection Criteria
Pulse
STOP
Mode
STOP¹
Unit
Ignored
t_pulse ≤ 3
Bus clocks
t_pulse ≤ t_pign
Uncertain
3 < t_pulse < 4
Bus clocks
t_pign < t_pulse < t_pval
Valid
t_pulse ≥ 4
Bus clocks
t_pulse ≥ t_pval
1 _{These values include the spread of the oscillator frequency over temperature,}
voltage and process.
t_pulse
Figure 2-50. Pulse Illustration
A valid edge on an input is detected if four consecutive samples of a passive level are followed by four
consecutive samples of an active level directly or indirectly.
The filters are continuously clocked by the bus clock in Run and Wait mode. In Stop mode the clock is
generated by a single RC oscillator in the Port Integration Module. To maximize current saving the RC
oscillator runs only if the following condition is true on any pin:
Sample count <= 4 and port interrupt enabled (PIE = 1) and port interrupt flag not set (PIF = 0).
2.4.11 Port H
This port is associated with the SPI1.
Port H pins PH[7:0] can be used for either general purpose I/O, or with the SPI subsystems. During reset,
port H pins are configured as high-impedance inputs.
Port H pins can be used with the routed SPI1 module. Refer to Figure 2-23.
Port H offers eight I/O ports with the same interrupt features as port P.
2.4.12 Port J
This port is associated with the CAN4, CAN0, and the IIC.
Port J pins PJ[7:6] and PJ[1:0] can be used for either general purpose I/O, or with the CAN and IIC
subsystems. During reset, port J pins are configured as inputs with pull-up. If IIC takes precedence the pins
become IIC open-drain output pins.
The CAN4 pins can be re-routed. Refer to Figure 2-23. Port J pins can be used with the routed CAN0
modules. Refer to Figure 2-23.
Port J offers four I/O ports with the same interrupt features as port P.
MC3S12RG128 Data Sheet, Rev. 1.05
Freescale Semiconductor
111