MC3S12RG128 Datasheet, PDF (78/546 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 2 Port Integration Module (PIM3RG128V1) Block Description
Address
0x001F
0x0020
0x0021
0x0022
0x0023
0x0024
0x0025
0x0026
0x0027
0x0028
0x0029
0x002A
0x002B
0x002C
0x002D
0x002E
0x002F
0x0030–
0x003F
Name
PIFP
PTH
PTIH
DDRH
RDRH
PERH
PPSH
PIEH
PIFH
PTJ
PTIJ
DDRJ
RDRJ
PERJ
PPSJ
PIEJ
PIFJ
Reserved
Bit 7
R
PIFP7
W
R
PTH7
W
R PTIH7
W
R
DDRH7
W
R
RDRH7
W
R
PERH7
W
R
PPSH7
W
R
PIEH7
W
R
PIFH7
W
R
PTJ7
W
R PTIJ7
W
R
DDRJ7
W
R
RDRJ7
W
R
PERJ7
W
R
PPSJ7
W
R
PIEJ7
W
R
PIFJ7
W
R
W
6
PIFP6
5
PIFP5
4
PIFP4
3
PIFP3
2
PIFP2
PTH6
PTIH6
PTH5
PTIH5
PTH4
PTIH4
PTH3
PTIH3
PTH2
PTIH2
DDRH6 DDRH5 DDRH4 DDRH3 DDRH2
RDRH6 RDRH5 RDRH4 RDRH3 RDRH2
PERH6 PERH5 PERH4 PERH3 PERH2
PPSH6 PPSH5 PPSH4 PPSH3 PPSH2
PIEH6 PIEH5 PIEH4 PIEH3 PIEH2
PIFH6
PTJ6
PTIJ6
PIFH5
0
0
PIFH4
0
0
PIFH3
0
0
PIFH2
0
0
0
0
0
0
DDRJ6
0
0
0
0
RDRJ6
0
0
0
0
PERJ6
0
0
0
0
PPSJ6
0
0
0
0
PIEJ6
0
0
0
0
PIFJ6
= Unimplemented or Reserved
Figure 2-2. PIM Register Summary (Sheet 3 of 3)
1
PIFP1
PTH1
PTIH1
DDRH1
RDRH1
PERH1
PPSH1
PIEH1
PIFH1
PTJ1
PTIJ1
DDRJ1
RDRJ1
PERJ1
PPSJ1
PIEJ1
PIFJ1
Bit 0
PIFP0
PTH0
PTIH0
DDRH0
RDRH0
PERH0
PPSH0
PIEH0
PIFH0
PTJ0
PTIJ0
DDRJ0
RDRJ0
PERJ0
PPSJ0
PIEJ0
PIFJ0
NOTE
Register Address = Base Address + Address Offset, where the Base Address
is defined at the MCU level and the Address Offset is defined at the module
level.
MC3S12RG128 Data Sheet, Rev. 1.05
78
Freescale Semiconductor