MC3S12RG128 Datasheet, PDF (464/546 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 16 Serial Communications Interface (SCIV2) Block Description
In Figure 16-16, a large burst of noise is perceived as the beginning of a start bit, although the test sample
at RT5 is high. The RT5 sample sets the noise flag. Although this is a worst-case misalignment of perceived
bit time, the data samples RT8, RT9, and RT10 are within the bit time and data recovery is successful.
PERCEIVED START BIT
ACTUAL START BIT
LSB
Rx input Signal
SAMPLES 1 1 1 0
0
1
0000
RT CLOCK
RT CLOCK COUNT
RESET RT CLOCK
Figure 16-16. Start Bit Search Example 3
Figure 16-17 shows the effect of noise early in the start bit time. Although this noise does not affect proper
synchronization with the start bit time, it does set the noise flag.
PERCEIVED AND ACTUAL START BIT
LSB
Rx Input Signal
SAMPLES 1 1 1 1 1 1 1 1 1 0
1
0
RT CLOCK
RT CLOCK COUNT
RESET RT CLOCK
Figure 16-17. Start Bit Search Example 4
MC3S12RG128 Data Sheet, Rev. 1.05
464
Freescale Semiconductor