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MC3S12RG128 Datasheet, PDF (286/546 Pages) Freescale Semiconductor, Inc – Microcontrollers | |||
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Chapter 10 Enhanced Capture Timer (ECT16B8CV1) Block Description
10.3.2.6 Timer System Control Register 1 (TSCR1)
Module Base + 0x0006
7
6
5
4
3
2
1
0
R
0
0
0
0
TEN
TSWAI
TSFRZ
TFFCA
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 10-8. Timer System Control Register 1 (TSCR1)
Read or write anytime.
Table 10-3. TSCR1 Field Descriptions
Field
7
TEN
6
TSWAI
5
TSFRZ
4
TFFCA
Description
Timer Enable
0 Disables the main timer, including the counter. Can be used for reducing power consumption.
1 Allows the timer to function normally.
Note: If for any reason the timer is not active, there is no ÷64 clock for the pulse accumulator since the ÷64 is
generated by the timer prescaler.
Timer Module Stops While in Wait
0 Allows the timer module to continue running during wait.
1 Disables the timer module when the MCU is in the wait mode. Timer interrupts cannot be used to get the MCU
out of wait.
Note: TSWAI also affects pulse accumulators and modulus down counters.
Timer and Modulus Counter Stop While in Freeze Mode
0 Allows the timer and modulus counter to continue running while in freeze mode.
1 Disables the timer and modulus counter whenever the MCU is in freeze mode. This is useful for emulation.
Note: TSFRZ does not stop the pulse accumulator.
Timer Fast Flag Clear All
0 Allows the timer ï¬ag clearing to function normally.
1 For TFLG1(0x000E), a read from an input capture or a write to the output compare channel (0x0010â0x001F)
causes the corresponding channel ï¬ag, CnF, to be cleared. For TFLG2 (0x000F), any access to the TCNT
register (0x0004, 0x0005) clears the TOF ï¬ag. Any access to the PACN3 and PACN2 registers (0x0022,
0x0023) clears the PAOVF and PAIF ï¬ags in the PAFLG register (0x0021). Any access to the PACN1 and
PACN0 registers (0x0024, 0x0025) clears the PBOVF ï¬ag in the PBFLG register (0x0031). This has the
advantage of eliminating software overhead in a separate clear sequence. Extra care is required to avoid
accidental ï¬ag clearing due to unintended accesses.
MC3S12RG128 Data Sheet, Rev. 1.05
286
Freescale Semiconductor
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