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MC3S12RG128 Datasheet, PDF (65/546 Pages) Freescale Semiconductor, Inc – Microcontrollers
Chapter 1 Device Overview (MC3S12RG128V1)
Table 1-6. Mode Selection
BKGD =
MODC
PE6 =
MODB
PE5 =
MODA
PK7 =
ROMON
ROMCTL1
Bit
Mode Description
0
0
0
X
1
Special Single Chip, BDM allowed and ACTIVE. BDM is
allowed in all other modes but a serial command is
required to make BDM active.
0
0
1
0
1
Emulation Expanded Narrow, BDM allowed
1
0
0
1
0
X
0
Special Test (Expanded Wide), BDM allowed
0
1
1
0
1
Emulation Expanded Wide, BDM allowed
1
0
1
0
0
X
1
Normal Single Chip, BDM allowed
1
0
1
0
0
Normal Expanded Narrow, BDM allowed
1
1
1
1
0
X
1
Special Peripheral; BDM allowed but bus operations
would cause bus conflicts (must not be used)
1
1
1
0
0
Normal Expanded Wide, BDM allowed
1
1
1 This pin is not available in the 80 pin package. It is pulled to ‘1’ by an internal pull-up resistor.
For further explanation on the modes refer to the HCS12 Multiplexed External Bus Interface Block Guide.
Table 1-7. Clock Selection Based on PE7
PE7 = XCLKS
Description
1
Colpitts Oscillator selected
0
Pierce Oscillator/external clock selected
Table 1-8. Voltage Regulator VREGEN
VREGEN
1
0
Description
Internal Voltage Regulator enabled
Internal Voltage Regulator disabled, VDD1,2 and
VDDPLL must be supplied externally with 2.5V
1.4.1 Security
The device will make available a security feature preventing the unauthorized read and write of the
memory contents. This feature allows:
• Protection of the contents of ROM,
• Operation in single-chip mode, No BDM possible
The user must be reminded that part of the security must lie with the user’s code. An extreme example
would be user’s code that dumps the contents of the internal program. This code would defeat the purpose
of security. At the same time the user may also wish to put a back door in the user’s program.
MC3S12RG128 Data Sheet, Rev. 1.05
Freescale Semiconductor
65