MC3S12RG128 Datasheet, PDF (319/546 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 11
Inter-Integrated Circuit (IICV2) Block Description
Version Revision Effective
Number Date
Date
0.1 8-Sep-99
2.06
18-Aug-20
02
2.07
12-Mar-20
04
Author
Description of Changes
Original draft. Distributed only within Freescale
Reformated for SRS3.0,and add examples for programing general
use and some diagrams to make it more user friendly as suggested
by Joachim
Changed to Freescale chapter format
11.1 Introduction
The inter-IC bus (IIC) is a two-wire, bidirectional serial bus that provides a simple, efficient method of data
exchange between devices. Being a two-wire device, the IIC bus minimizes the need for large numbers of
connections between devices, and eliminates the need for an address decoder.
This bus is suitable for applications requiring occasional communications over a short distance between a
number of devices. It also provides flexibility, allowing additional devices to be connected to the bus for
further expansion and system development.
The interface is designed to operate up to 100 kbps with maximum bus loading and timing. The device is
capable of operating at higher baud rates, up to a maximum of clock/20, with reduced bus loading. The
maximum communication length and the number of devices that can be connected are limited by a
maximum bus capacitance of 400 pF.
11.1.1 Features
The IIC module has the following key features:
• Compatible with I2C bus standard
• Multi-master operation
• Software programmable for one of 256 different serial clock frequencies
• Software selectable acknowledge bit
• Interrupt driven byte-by-byte data transfer
• Arbitration lost interrupt with automatic mode switching from master to slave
MC3S12RG128 Data Sheet, Rev. 1.05
Freescale Semiconductor
319