MC3S12RG128 Datasheet, PDF (217/546 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 8 Analog-to-Digital Converter (ATD10B8CV3)
Register
Name
Bit 7
6
5
4
3
2
1
Bit 0
0x000A
R
Unimplemente
W
d
0x000B
ATDSTAT1
R CCF7
W
CCF6
CCF5
CCF4
CCF3
CCF2
CCF1
CCF0
0x000C
R
Unimplemente
W
d
0x000D
ATDDIEN
R
IEN7
W
IEN6
IEN5
IEN4
IEN3
IEN2
IEN1
IEN0
0x000E
R
Unimplemente
W
d
0x000F
PORTAD
R PTAD7
W
PTAD6
PTAD5
PTAD4
PTAD3
PTAD2
PTAD1
PTAD0
Left Justified Result Data
Note: The read portion of the left justified result data registers has been divided to show the bit position when reading 10-bit and
8-bit conversion data. For more detailed information refer to Section 8.3.2.13, “ATD Conversion Result Registers
(ATDDRx)”.
0x0010
ATDDR0H
10-BIT BIT 9 MSB
8-BIT BIT 7 MSB
BIT 8
BIT 6
BIT 7
BIT 5
BIT 6
BIT 4
BIT 5
BIT 3
BIT 4
BIT 2
BIT 3
BIT 1
BIT 2
BIT 0
W
0x0011
10-BIT BIT 1
BIT 0
0
0
0
0
0
0
ATDDR0L
8-BIT
U
U
0
0
0
0
0
0
W
0x0012
ATDDR1H
10-BIT BIT 9 MSB
8-BIT BIT 7 MSB
W
BIT 8
BIT 6
BIT 7
BIT 5
BIT 6
BIT 4
BIT 5
BIT 3
BIT 4
BIT 2
BIT 3
BIT 1
BIT 2
BIT 0
0x0013
10-BIT BIT 1
BIT 0
0
0
0
0
0
0
ATDDR1L
8-BIT
U
U
0
0
0
0
0
0
W
0x0014
ATDDR2H
10-BIT BIT 9 MSB
8-BIT BIT 7 MSB
W
BIT 8
BIT 6
BIT 7
BIT 5
BIT 6
BIT 4
BIT 5
BIT 3
BIT 4
BIT 2
BIT 3
BIT 1
BIT 2
BIT 0
0x0015
10-BIT BIT 1
BIT 0
0
0
0
0
0
0
ATDDR2L
8-BIT
U
U
0
0
0
0
0
0
W
= Unimplemented or Reserved
Figure 8-2. ATD Register Summary (Sheet 2 of 5)
MC3S12RG128 Data Sheet, Rev. 1.05
Freescale Semiconductor
217