MC3S12RG128 Datasheet, PDF (63/546 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 1 Device Overview (MC3S12RG128V1)
1.2.4.2 V_DDR, V_SSR — Power & Ground Pins for I/O Drivers & for Internal Voltage
Regulator
External power and ground for I/O drivers and input to the internal voltage regulator. Because fast signal
transitions place high, short-duration current demands on the power supply, use bypass capacitors with
high-frequency characteristics and place them as close to the MCU as possible. Bypass requirements
depend on how heavily the MCU pins are loaded.
1.2.4.3 V_DD1, V_DD2, V_SS1, V_SS2 — Internal Logic Power Supply Pins
Power is supplied to the MCU by the internal voltage regulator (if enabled) through V_DD1/V_DD2 and
V_SS1/V_SS2. Because fast signal transitions place high, short-duration current demands on the power
supply, use bypass capacitors with high-frequency characteristics and place them as close to the MCU as
possible. This 2.5V supply is derived from the internal voltage regulator. There is no static load on those
pins allowed. The internal voltage regulator is turned off, if VREGEN is tied to ground.
NOTE
No load allowed except for bypass capacitors.
1.2.4.4 V_DDA, V_SSA — Power Supply Pins for ATD and VREG
V_DDA, V_SSA are the power supply and ground input pins for the voltage regulator and the analog to digital
converter. It also provides the reference for the internal voltage regulator. This allows the supply voltage
to the ATD and the reference voltage to be bypassed independently.
1.2.4.5 V_RH, V_RL — ATD Reference Voltage Input Pins
V_RH and V_RL are the reference voltage input pins for the analog to digital converter.
1.2.4.6 V_DDPLL, V_SSPLL — Power Supply Pins for PLL
Provides operating voltage and ground for the Oscillator and the Phased-Locked Loop. This allows the
supply voltage to the Oscillator and PLL to be bypassed independently.This 2.5V voltage is generated by
the internal voltage regulator.
NOTE
No load allowed except for bypass capacitors and/or XFC filter components
(please refer A.6.3.1 XFC Component Selection for details).
1.2.4.7 VREGEN — On Chip Voltage Regulator Enable
Enables the internal 5V to 2.5V voltage regulator. If this pin is tied low, V_DD1,2 and V_DDPLL must be
supplied externally.
1.3 System Clock Description
The Clock and Reset Generator provides the internal clock signals for the core and all peripheral modules.
Figure 1-10 shows the clock connections from the CRG to all modules.
MC3S12RG128 Data Sheet, Rev. 1.05
Freescale Semiconductor
63