HD64F2357F20V Datasheet, PDF (974/1049 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-chip Microcomputer H8S Family / H8S/2300 Series

TSTR—Timer Start Register
Bit
:
7
—
Initial value :
0
Read/Write : —
H'FFC0
TPU
6
5
4
3
2
1
0
—
CST5 CST4 CST3 CST2 CST1 CST0
0
0
0
0
0
0
0
—
R/W
R/W
R/W
R/W
R/W
R/W
Counter Start
0 TCNTn count operation is stopped
1 TCNTn performs count operation
(n = 5 to 0)
Note:
If 0 is written to the CST bit during operation with the TIOC pin designated for output,
the counter stops but the TIOC pin output compare output level is retained. If TIOR
is written to when the CST bit is cleared to 0, the pin output level will be changed to
the set initial output value.
TSYR—Timer Synchro Register
Bit
:
7
—
Initial value :
0
Read/Write : —
H'FFC1
TPU
6
5
4
3
2
1
0
— SYNC5 SYNC4 SYNC3 SYNC2 SYNC1 SYNC0
0
0
0
0
0
0
0
—
R/W R/W R/W R/W R/W R/W
Timer Synchronization
0 TCNTn operates independently (TCNT presetting/
clearing is unrelated to other channels)
1 TCNTn performs synchronous operation
TCNT synchronous presetting/synchronous clearing
is possible
(n = 5 to 0)
Notes: 1.
2.
To set synchronous operation, the SYNC bits for at least two channels must
be set to 1.
To set synchronous clearing, in addition to the SYNC bit, the TCNT clearing
source must also be set by means of bits CCLR2 to CCLR0 in TCR.
Rev.6.00 Oct.28.2004 page 944 of 1016
REJ09B0138-0600H